diff options
| author | Albert Magyar | 2019-10-01 14:16:58 -0700 |
|---|---|---|
| committer | GitHub | 2019-10-01 14:16:58 -0700 |
| commit | 1ced6cf929b436380364e9b893e8de7edc3205fd (patch) | |
| tree | c0998198ebc9036308754826ffb863e43259f3fa /src/main/antlr4 | |
| parent | 4ca2b859473e0a88723463eac2821cfbd3249c43 (diff) | |
| parent | 082bc994457cc5f6780b58fb914a6ab3eb8a021f (diff) | |
Merge pull request #1183 from freechipsproject/mem-read-under-write
Implement read-first memory behavior in Verilog
Diffstat (limited to 'src/main/antlr4')
| -rw-r--r-- | src/main/antlr4/FIRRTL.g4 | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/main/antlr4/FIRRTL.g4 b/src/main/antlr4/FIRRTL.g4 index c3b4e74e..be15ab7c 100644 --- a/src/main/antlr4/FIRRTL.g4 +++ b/src/main/antlr4/FIRRTL.g4 @@ -94,7 +94,7 @@ stmt | 'reg' id ':' type exp ('with' ':' reset_block)? info? | 'mem' id ':' info? INDENT memField* DEDENT | 'cmem' id ':' type info? - | 'smem' id ':' type info? + | 'smem' id ':' type ruw? info? | mdir 'mport' id '=' id '[' exp ']' exp info? | 'inst' id 'of' id info? | 'node' id '=' exp info? |