diff options
| author | azidar | 2015-04-08 11:28:29 -0700 |
|---|---|---|
| committer | azidar | 2015-04-08 11:28:29 -0700 |
| commit | e5b9f6ec710e8573ce262330731bebc7524296e5 (patch) | |
| tree | 1494853a2939b20bb2c671d3c46daa29b76ecec3 /spec | |
| parent | d4fdab6950b47379137fce750e4a3a6b262e750d (diff) | |
Finished expand whens. started infer widths. added pdf for people to view
Diffstat (limited to 'spec')
| -rw-r--r-- | spec/spec.pdf | bin | 0 -> 144166 bytes | |||
| -rw-r--r-- | spec/spec.tex | 11 |
2 files changed, 7 insertions, 4 deletions
diff --git a/spec/spec.pdf b/spec/spec.pdf Binary files differnew file mode 100644 index 00000000..f8a00185 --- /dev/null +++ b/spec/spec.pdf diff --git a/spec/spec.tex b/spec/spec.tex index 0eb6e627..a246b663 100644 --- a/spec/spec.tex +++ b/spec/spec.tex @@ -38,6 +38,8 @@ &\vert &\pds{type}[\ints] &\text{Vector}\\ \pd{field} &= &\pd{gender} \id \kw{:} \pd{type} &\text{Bundle Field}\\ \pd{gender} &= &\kws{female} \vert \kws{male} &\text{Gender}\\ +\pd{vptype} &= &\kws{read} \vert \kws{write} \vert \kws{rdwr} &\text{Known Vector Port-Type}\\ + &\vert &\kw{?} &\text{Unknown Vector Port-Type}\\ \pd{width} &= &\ints &\text{Known Integer Width}\\ &\vert &\kw{?} &\text{Unknown Width}\\ \pd{stmt} &= &\info \kw{wire} \id \kw{:} \pd{type} &\text{Wire Declaration}\\ @@ -45,7 +47,7 @@ &\vert &\info \kw{mem} \id \kw{:} \pd{type} &\text{Memory Declaration}\\ &\vert &\info \kw{inst} \id \kw{of} \id &\text{Instance Declaration}\\ &\vert &\info \kw{node} \id = \pd{exp} &\text{Node Declaration}\\ - &\vert &\info \kw{accessor} \id = \pds{exp}[\pds{exp}] &\text{Accessor Declaration}\\ + &\vert &\info \pd{vptype} \kw{accessor} \id = \pds{exp}[\pds{exp}] &\text{Accessor Declaration}\\ &\vert &\info \pd{exp} \kw{:=} \pd{exp} &\text{Connect}\\ &\vert &\info \kw{when} \pd{exp} \kw{:} \pd{stmt} \kw{else :} \pd{stmt} &\text{Conditional}\\ &\vert &\info (\pd{stmt*}) &\text{Statement Group}\\ @@ -55,9 +57,10 @@ &\vert &\info \id &\text{Reference}\\ &\vert &\info \pds{exp}.\id &\text{Subfield}\\ &\vert &\info \pds{exp}.\ints &\text{Subindex}\\ - &\vert &\info \kws{Register}(\pds{exp}, \pds{exp}) &\text{Structural Register}\\ - &\vert &\info \kws{WritePort}(\id, \pds{exp}, \pds{exp}) &\text{Structural Write Port}\\ - &\vert &\info \kws{ReadPort}(\id, \pds{exp}, \pds{exp}) &\text{Structural Read Port}\\ + &\vert &\info \kws{Register}(\pds{exp}, \pds{exp}) &\text{Register}\\ + &\vert &\info \kws{WritePort}(\id, \pds{exp}, \pds{exp}) &\text{Write Port}\\ + &\vert &\info \kws{ReadPort}(\id, \pds{exp}, \pds{exp}) &\text{Read Port}\\ + &\vert &\info \kws{ReadWritePort}(\id, \pds{exp}, \pds{exp}) &\text{ReadWrite Port}\\ \end{array} \] \[ |
