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| author | Jack Koenig | 2017-06-27 17:25:57 -0700 |
|---|---|---|
| committer | Jack Koenig | 2017-06-27 18:50:15 -0700 |
| commit | 6f55a30b201716b6a0e72b65f6e5777b6b5d4b81 (patch) | |
| tree | 61f5f7f7f278afbcd4fe1f5d6f7c4b4e536ce117 /scripts | |
| parent | f8572ba6532359e8a0f1bc34f3eb8241a29129ab (diff) | |
Emitting reg update mux tree, only walk netlist for wires and nodes
Fixes bug where the Verilog emitter could pull the next value for a
register that feeds a second register, removing the first register from
the second register's update.
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions