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authorazidar2015-04-24 17:00:55 -0700
committerazidar2015-04-24 17:00:55 -0700
commitd455233c76148bb3f3d26734667b1b9a565d0f39 (patch)
treeef787da880d3f74c10333d9464edc46fe59776cf
parentced5ddb48843cd5b00498d1066f52c2925b142b9 (diff)
Merged TODO
-rw-r--r--TODO6
1 files changed, 0 insertions, 6 deletions
diff --git a/TODO b/TODO
index ee27c94f..47588213 100644
--- a/TODO
+++ b/TODO
@@ -6,11 +6,8 @@
on-reset
Make instances always male, flip the bundles on declaration
dlsh,drsh
-<<<<<<< HEAD
move Infer-Widths to before vec expansion?
Add Unit Tests for each pass
-=======
->>>>>>> 5a2a495ce88eec9e2e79cfbfe7f5548cede25874
======== Update Core ==========
Add source locaters
@@ -27,12 +24,9 @@ Well-formed high firrtl
UInt only has positive ints
No combinational loops
cannot connect to a pad, or a register. only connct to a reference
-<<<<<<< HEAD
onreset can only handle a register
all references are declared
-=======
expression in pad must be a ground type
->>>>>>> 5a2a495ce88eec9e2e79cfbfe7f5548cede25874
After adding dynamic assertions, insert bounds check with accessor expansion
Well-formed low firrtl
All things only assigned to once