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authorAlbert Magyar2020-03-02 13:55:19 -0800
committerGitHub2020-03-02 13:55:19 -0800
commitc37690f3087fb38f0cd8959dcc65dbad6c75f74c (patch)
tree3a919c513831e4274d35770628f5df532c586901
parentc6a201dd335c75d96e1a4547ea783b257bd6f644 (diff)
Update single-line when/else example in spec to match implementation (#1414)
* Closes #890
-rw-r--r--spec/spec.pdfbin275480 -> 275420 bytes
-rw-r--r--spec/spec.tex3
2 files changed, 1 insertions, 2 deletions
diff --git a/spec/spec.pdf b/spec/spec.pdf
index b60c3cb7..5b967bbe 100644
--- a/spec/spec.pdf
+++ b/spec/spec.pdf
Binary files differ
diff --git a/spec/spec.tex b/spec/spec.tex
index 9aa1e6b4..70b073c3 100644
--- a/spec/spec.tex
+++ b/spec/spec.tex
@@ -1743,12 +1743,11 @@ The following statement:
when c :
a <= b
else :
- c <= d
e <= f
\end{lstlisting}
can be equivalently expressed on a single line as follows.
\begin{lstlisting}
-when c : (a <= b) else : (c <= d, e <= f)
+when c : a <= b else : e <= f
\end{lstlisting}
All circuits, modules, ports and statements can optionally be followed with the info token \verb|@[fileinfo]| where fileinfo is a string containing the source file information from where it was generated.