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authorJack Koenig2020-09-23 10:13:17 -0700
committerGitHub2020-09-23 10:13:17 -0700
commit8a993e85e989e2d89b12fe154366597df3f903b9 (patch)
tree1905b6e32e7e42f61ac85087e5589471e1727d7a
parentecb96e83324ea17cf38b7b90753d745d3c7f51bd (diff)
Improve Travis Chisel tests (#1903)
-rw-r--r--.run_chisel_tests.sh7
-rw-r--r--.travis.yml1
2 files changed, 3 insertions, 5 deletions
diff --git a/.run_chisel_tests.sh b/.run_chisel_tests.sh
index dfa54307..dbec894e 100644
--- a/.run_chisel_tests.sh
+++ b/.run_chisel_tests.sh
@@ -11,11 +11,10 @@ TREADLE_BRANCH="master"
if git log --format=%B --no-merges ${TRAVIS_COMMIT_RANGE/.../..} | grep '\[skip chisel tests\]'; then
exit 0
else
+ sbt $SBT_ARGS publishLocal
git clone https://github.com/freechipsproject/treadle.git --single-branch -b ${TREADLE_BRANCH} --depth 10
- (cd treadle && sbt $SBT_ARGS +publishLocal)
+ (cd treadle && sbt $SBT_ARGS publishLocal)
git clone https://github.com/ucb-bar/chisel3.git --single-branch -b ${CHISEL_BRANCH}
- mkdir -p chisel3/lib
- cp utils/bin/firrtl.jar chisel3/lib
cd chisel3
- sbt "set concurrentRestrictions in Global += Tags.limit(Tags.Test, 2)" clean test
+ sbt $SBT_ARGS test
fi
diff --git a/.travis.yml b/.travis.yml
index ed59627b..0a698ff2 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -95,7 +95,6 @@ jobs:
use: firrtl_build
script:
- verilator --version
- - sbt $SBT_ARGS +publishLocal
- bash .run_chisel_tests.sh
- stage: test
name: "Formal equivalence: RocketCore"