Reorganized Primops (renamed from PrimOps), added maps and functions to convert object <=> string, added eqv and neqv

7 files changed, 164 insertions, 123 deletions

diff --git a/src/main/antlr4/FIRRTL.g4 b/src/main/antlr4/FIRRTL.g4
index d9f3d18f..96172895 100644
--- a/src/main/antlr4/FIRRTL.g4
+++ b/src/main/antlr4/FIRRTL.g4
@@ -125,6 +125,8 @@ primop
   | 'geq'
   | 'eq'
   | 'neq'
+  | 'eqv'
+  | 'neqv'
   | 'mux'
   | 'pad'
   | 'asUInt'
diff --git a/src/main/scala/firrtl/DebugUtils.scala b/src/main/scala/firrtl/DebugUtils.scala
index 01fe4fe4..e802d935 100644
--- a/src/main/scala/firrtl/DebugUtils.scala
+++ b/src/main/scala/firrtl/DebugUtils.scala
@@ -7,6 +7,69 @@ import Utils._
 
 private object DebugUtils {
 
+  implicit class DebugASTUtils(ast: AST) {
+    // Is this actually any use?
+    def preOrderTraversal(f: AST => Unit): Unit = {
+      f(ast)
+      ast match {
+        case a: Block => a.stmts.foreach(_.preOrderTraversal(f))
+        case a: Assert => a.pred.preOrderTraversal(f)
+        case a: When => {
+          a.pred.preOrderTraversal(f)
+          a.conseq.preOrderTraversal(f)
+          a.alt.preOrderTraversal(f)
+        }
+        case a: BulkConnect => {
+          a.lhs.preOrderTraversal(f)
+          a.rhs.preOrderTraversal(f)
+        }
+        case a: Connect => {
+          a.lhs.preOrderTraversal(f)
+          a.rhs.preOrderTraversal(f)
+        }
+        case a: OnReset => {
+          a.lhs.preOrderTraversal(f)
+          a.rhs.preOrderTraversal(f)
+        }
+        case a: DefAccessor => {
+          a.dir.preOrderTraversal(f)
+          a.source.preOrderTraversal(f)
+          a.index.preOrderTraversal(f)
+        }
+        case a: DefPoison => a.tpe.preOrderTraversal(f)
+        case a: DefNode => a.value.preOrderTraversal(f)
+        case a: DefInst => a.module.preOrderTraversal(f)
+        case a: DefMemory => {
+          a.tpe.preOrderTraversal(f)
+          a.clock.preOrderTraversal(f)
+        }
+        case a: DefReg => {
+          a.tpe.preOrderTraversal(f)
+          a.clock.preOrderTraversal(f)
+          a.reset.preOrderTraversal(f)
+        }
+        case a: DefWire => a.tpe.preOrderTraversal(f)
+        case a: Field => {
+          a.dir.preOrderTraversal(f)
+          a.tpe.preOrderTraversal(f)
+        }
+        case a: VectorType => a.tpe.preOrderTraversal(f)
+        case a: BundleType => a.fields.foreach(_.preOrderTraversal(f))
+        case a: Port => {
+          a.dir.preOrderTraversal(f)
+          a.tpe.preOrderTraversal(f)
+        }
+        case a: Module => {
+          a.ports.foreach(_.preOrderTraversal(f))
+          a.stmt.preOrderTraversal(f)
+        }
+        case a: Circuit => a.modules.foreach(_.preOrderTraversal(f)) 
+        //case _ => throw new Exception(s"Unsupported FIRRTL node ${ast.getClass.getSimpleName}!")
+        case _ => 
+      }
+    }
+  }
+
 
   /** Private class for recording and organizing debug information  */
   class Logger private (
diff --git a/src/main/scala/firrtl/IR.scala b/src/main/scala/firrtl/IR.scala
index bd9bd484..5eb4e9e6 100644
--- a/src/main/scala/firrtl/IR.scala
+++ b/src/main/scala/firrtl/IR.scala
@@ -15,42 +15,44 @@ case class FileInfo(file: String, line: Int, column: Int) {
 
 trait AST 
 
-trait PrimOp extends AST
-case object Add extends PrimOp 
-case object Sub extends PrimOp
-case object Addw extends PrimOp
-case object Subw extends PrimOp
-case object Mul extends PrimOp
-case object Div extends PrimOp
-case object Mod extends PrimOp
-case object Quo extends PrimOp
-case object Rem extends PrimOp
-case object Lt extends PrimOp
-case object Leq extends PrimOp
-case object Gt extends PrimOp
-case object Geq extends PrimOp
-case object Eq extends PrimOp
-case object Neq extends PrimOp
-case object Mux extends PrimOp
-case object Pad extends PrimOp
-case object AsUInt extends PrimOp
-case object AsSInt extends PrimOp
-case object Shl extends PrimOp
-case object Shr extends PrimOp
-case object Dshl extends PrimOp
-case object Dshr extends PrimOp
-case object Cvt extends PrimOp
-case object Neg extends PrimOp
-case object Not extends PrimOp
-case object And extends PrimOp
-case object Or extends PrimOp
-case object Xor extends PrimOp
-case object Andr extends PrimOp
-case object Orr extends PrimOp
-case object Xorr extends PrimOp
-case object Cat extends PrimOp
-case object Bit extends PrimOp
-case object Bits extends PrimOp
+trait Primop extends AST
+case object Add extends Primop 
+case object Sub extends Primop
+case object Addw extends Primop
+case object Subw extends Primop
+case object Mul extends Primop
+case object Div extends Primop
+case object Mod extends Primop
+case object Quo extends Primop
+case object Rem extends Primop
+case object Lt extends Primop
+case object Leq extends Primop
+case object Gt extends Primop
+case object Geq extends Primop
+case object Eq extends Primop
+case object Neq extends Primop
+case object Eqv extends Primop
+case object Neqv extends Primop
+case object Mux extends Primop
+case object Pad extends Primop
+case object AsUInt extends Primop
+case object AsSInt extends Primop
+case object Shl extends Primop
+case object Shr extends Primop
+case object Dshl extends Primop
+case object Dshr extends Primop
+case object Cvt extends Primop
+case object Neg extends Primop
+case object Not extends Primop
+case object And extends Primop
+case object Or extends Primop
+case object Xor extends Primop
+case object Andr extends Primop
+case object Orr extends Primop
+case object Xorr extends Primop
+case object Cat extends Primop
+case object Bit extends Primop
+case object Bits extends Primop
 
 // TODO stanza ir has types on many of these, why? Is it the type of what we're referencing?
 // Add types, default to UNKNOWN
@@ -61,7 +63,7 @@ case class SIntValue(value: BigInt, width: Width) extends Exp
 case class Ref(name: String, tpe: Type) extends Exp
 case class Subfield(exp: Exp, name: String, tpe: Type) extends Exp
 case class Index(exp: Exp, value: BigInt, tpe: Type) extends Exp
-case class DoPrimOp(op: PrimOp, args: Seq[Exp], consts: Seq[BigInt], tpe: Type) extends Exp 
+case class DoPrimop(op: Primop, args: Seq[Exp], consts: Seq[BigInt], tpe: Type) extends Exp 
 
 trait AccessorDir extends AST
 case object Infer extends AccessorDir
diff --git a/src/main/scala/firrtl/Passes.scala b/src/main/scala/firrtl/Passes.scala
index 4b31b1ff..39e6b64e 100644
--- a/src/main/scala/firrtl/Passes.scala
+++ b/src/main/scala/firrtl/Passes.scala
@@ -50,7 +50,7 @@ object Passes {
       case e: Ref => Ref(e.name, typeMap(e.name))
       case e: Subfield => Subfield(e.exp, e.name, getBundleSubtype(e.exp.getType, e.name))
       case e: Index => Index(e.exp, e.value, getVectorSubtype(e.exp.getType))
-      case e: DoPrimOp => lowerAndTypePrimop(e)
+      case e: DoPrimop => lowerAndTypePrimop(e)
       case e: Exp => e
     }
   }
diff --git a/src/main/scala/firrtl/Primops.scala b/src/main/scala/firrtl/Primops.scala
index 5301390c..1840b190 100644
--- a/src/main/scala/firrtl/Primops.scala
+++ b/src/main/scala/firrtl/Primops.scala
@@ -6,8 +6,54 @@ import DebugUtils._
 
 object Primops {
 
+  private val mapPrimop2String = Map[Primop, String](
+    Add -> "add",
+    Sub -> "sub",
+    Addw -> "addw",
+    Subw -> "subw",
+    Mul -> "mul",
+    Div -> "div",
+    Mod -> "mod",
+    Quo -> "quo",
+    Rem -> "rem",
+    Lt -> "lt",
+    Leq -> "leq",
+    Gt -> "gt",
+    Geq -> "geq",
+    Eq -> "eq",
+    Neq -> "neq",
+    Eqv -> "eqv",
+    Neqv -> "neqv",
+    Mux -> "mux",
+    Pad -> "pad",
+    AsUInt -> "asUInt",
+    AsSInt -> "asSInt",
+    Shl -> "shl",
+    Shr -> "shr",
+    Dshl -> "dshl",
+    Dshr -> "dshr",
+    Cvt -> "cvt",
+    Neg -> "neg",
+    Not -> "not",
+    And -> "and",
+    Or -> "or",
+    Xor -> "xor",
+    Andr -> "andr",
+    Orr -> "orr",
+    Xorr -> "xorr",
+    Cat -> "cat",
+    Bit -> "bit",
+    Bits -> "bits"
+  )
+  private val mapString2Primop = mapPrimop2String.map(_.swap)
+  def fromString(op: String): Primop = mapString2Primop(op)
+
+  implicit class PrimopImplicits(op: Primop){
+    def getString(): String = mapPrimop2String(op)
+  }
+
   // Borrowed from Stanza implementation
-  def lowerAndTypePrimop(e: DoPrimOp)(implicit logger: Logger): DoPrimOp = {
+  def lowerAndTypePrimop(e: DoPrimop)(implicit logger: Logger): DoPrimop = {
     def uAnd(op1: Exp, op2: Exp): Type = {
       (op1.getType, op2.getType) match {
         case (t1: UIntType, t2: UIntType) => UIntType(UnknownWidth)
@@ -41,6 +87,8 @@ object Primops {
       case Geq => UIntType(UnknownWidth)
       case Eq => UIntType(UnknownWidth)
       case Neq => UIntType(UnknownWidth)
+      case Eqv => UIntType(UnknownWidth)
+      case Neqv => UIntType(UnknownWidth)
       case Mux => ofType(e.args(1))
       case Pad => ofType(e.args(0))
       case AsUInt => UIntType(UnknownWidth)
@@ -63,7 +111,7 @@ object Primops {
       case Bits => UIntType(UnknownWidth)
       case _ => ??? 
     }
-    DoPrimOp(e.op, e.args, e.consts, tpe)
+    DoPrimop(e.op, e.args, e.consts, tpe)
   }
 
 }
diff --git a/src/main/scala/firrtl/Utils.scala b/src/main/scala/firrtl/Utils.scala
index f024edc2..4220e07f 100644
--- a/src/main/scala/firrtl/Utils.scala
+++ b/src/main/scala/firrtl/Utils.scala
@@ -9,6 +9,7 @@ package firrtl
 
 import scala.collection.mutable.StringBuilder
 import java.io.PrintWriter
+import Primops._
 //import scala.reflect.runtime.universe._
 
 object Utils {
@@ -48,46 +49,8 @@ object Utils {
       }
   }
 
-  implicit class PrimOpUtils(op: PrimOp) {
-    def serialize(implicit flags: FlagMap = FlagMap): String = {
-      op match { 
-        case Add => "add"
-        case Sub => "sub"
-        case Addw => "addw"
-        case Subw => "subw"
-        case Mul => "mul"
-        case Div => "div"
-        case Mod => "mod"
-        case Quo => "quo"
-        case Rem => "rem"
-        case Lt => "lt"
-        case Leq => "leq"
-        case Gt => "gt"
-        case Geq => "geq"
-        case Eq => "eq"
-        case Neq => "neq"
-        case Mux => "mux"
-        case Pad => "pad"
-        case AsUInt => "asUInt"
-        case AsSInt => "asSInt"
-        case Shl => "shl"
-        case Shr => "shr"
-        case Dshl => "dshl"
-        case Dshr => "dshr"
-        case Cvt => "cvt"
-        case Neg => "neg"
-        case Not => "not"
-        case And => "and"
-        case Or => "or"
-        case Xor => "xor"
-        case Andr => "andr"
-        case Orr => "orr"
-        case Xorr => "xorr"
-        case Cat => "cat"
-        case Bit => "bit"
-        case Bits => "bits"
-      } 
-    }
+  implicit class PrimopUtils(op: Primop) {
+    def serialize(implicit flags: FlagMap = FlagMap): String = op.getString
   }
 
   implicit class ExpUtils(exp: Exp) {
@@ -98,7 +61,7 @@ object Utils {
         case r: Ref => r.name
         case s: Subfield => s"${s.exp.serialize}.${s.name}"
         case s: Index => s"${s.exp.serialize}[${s.value}]"
-        case p: DoPrimOp => 
+        case p: DoPrimop => 
           s"${p.op.serialize}(" + (p.args.map(_.serialize) ++ p.consts.map(_.toString)).mkString(", ") + ")"
       } 
       ret + debug(exp)
@@ -108,7 +71,7 @@ object Utils {
       exp match {
         case s: Subfield => Subfield(f(s.exp), s.name, s.tpe)
         case i: Index => Index(f(i.exp), i.value, i.tpe)
-        case p: DoPrimOp => DoPrimOp(p.op, p.args.map(f), p.consts, p.tpe)
+        case p: DoPrimop => DoPrimop(p.op, p.args.map(f), p.consts, p.tpe)
         case e: Exp => e
       }
 
@@ -119,7 +82,7 @@ object Utils {
         case r: Ref => r.tpe
         case s: Subfield => s.tpe
         case i: Index => i.tpe
-        case p: DoPrimOp => p.tpe
+        case p: DoPrimop => p.tpe
       }
     }
   }
diff --git a/src/main/scala/firrtl/Visitor.scala b/src/main/scala/firrtl/Visitor.scala
index 8bbed2e3..7d54ca1a 100644
--- a/src/main/scala/firrtl/Visitor.scala
+++ b/src/main/scala/firrtl/Visitor.scala
@@ -14,6 +14,7 @@ import org.antlr.v4.runtime.tree.ErrorNode
 import org.antlr.v4.runtime.tree.TerminalNode
 import scala.collection.JavaConversions._
 import antlr._
+import Primops._
 
 class Visitor(val fullFilename: String) extends FIRRTLBaseVisitor[AST] 
 {
@@ -149,48 +150,10 @@ class Visitor(val fullFilename: String) extends FIRRTLBaseVisitor[AST]
             case "." => new Subfield(visitExp(ctx.exp(0)), ctx.id.getText, UnknownType)
             case "[" => new Index(visitExp(ctx.exp(0)), string2BigInt(ctx.IntLit(0).getText), UnknownType)
             case "(" => 
-              DoPrimOp(visitPrimop(ctx.primop), ctx.exp.map(visitExp),
+              DoPrimop(visitPrimop(ctx.primop), ctx.exp.map(visitExp),
                   ctx.IntLit.map(x => string2BigInt(x.getText)), UnknownType)
           }
       }
    
-   // TODO can I create this and have the opposite? create map and invert it?
-	private def visitPrimop[AST](ctx: FIRRTLParser.PrimopContext): PrimOp = 
-    ctx.getText match {
-      case "add" => Add
-      case "sub" => Sub
-      case "addw" => Addw
-      case "subw" => Subw
-      case "mul" => Mul
-      case "div" => Div
-      case "mod" => Mod
-      case "quo" => Quo
-      case "rem" => Rem
-      case "lt" => Lt
-      case "leq" => Leq
-      case "gt" => Gt
-      case "geq" => Geq
-      case "eq" => Eq
-      case "neq" => Neq
-      case "mux" => Mux
-      case "pad" => Pad
-      case "asUInt" => AsUInt
-      case "asSInt" => AsSInt
-      case "shl" => Shl
-      case "shr" => Shr
-      case "dshl" => Dshl
-      case "dshr" => Dshr
-      case "cvt" => Cvt
-      case "neg" => Neg
-      case "not" => Not
-      case "and" => And
-      case "or" => Or
-      case "xor" => Xor
-      case "andr" => Andr
-      case "orr" => Orr
-      case "xorr" => Xorr
-      case "cat" => Cat
-      case "bit" => Bit
-      case "bits" => Bits
-    }
+	private def visitPrimop[AST](ctx: FIRRTLParser.PrimopContext): Primop = fromString(ctx.getText)
 }