Finished supporting Chisel 2.0 Ref Chip

6 files changed, 42 insertions, 33 deletions

diff --git a/TODO b/TODO
index adc48534..3e7c47bf 100644
--- a/TODO
+++ b/TODO
@@ -3,9 +3,11 @@
 ================================================
 
 ======== Current Tasks ========
+add include support
 change parser to accept subword, but error
 --Merge with master
 put clocks on accessors
+add clock check to high firrtl check
 
 Tests:
    Lowering for instance types with bundle ports
diff --git a/src/main/stanza/bigint.stanza b/src/main/stanza/bigint.stanza
index 7d8e6426..427ad7ff 100644
--- a/src/main/stanza/bigint.stanza
+++ b/src/main/stanza/bigint.stanza
@@ -118,15 +118,18 @@ defn fill! (f: (Int) -> Int, b: BigInt) :
   b
 
 public defmethod equal? (x:BigInt, y:BigInt) -> True|False :
-  if num-words(x) != num-words(y) :
-    false
-  else :
-    var eq? = true
-    for i in 0 to num-words(x) do :
-      val e = (x[i] == y[i])
-      if not e : println-all(["NOT-EQUAL " x " AND " y " i=" i " X[i] " x[i] " Y[i] " y[i]])
-      eq? = eq? and e
-    eq?
+  val tf = 
+    if num-words(x) != num-words(y) :
+      false
+    else :
+      var eq? = true
+      for i in 0 to num-words(x) do :
+        val e = (x[i] == y[i])
+        ;if not e : ;println-all(["NOT-EQUAL " x " AND " y " i=" i " X[i] " x[i] " Y[i] " y[i]])
+        eq? = eq? and e
+      eq?
+  ;println-all(["EQUAL? " x " AND " y " " tf])
+  tf
 
 public defn less?! (diff:BigInt, x:BigInt, y:BigInt) -> True|False :
   sub!(diff, x, y)
@@ -180,7 +183,6 @@ public defn BigIntLit (s: String, w:Int) :
   lit
 
 public defn sizeof (in: Int) -> Int :
-  println(in)
   max(1, ceil-log2(in + 1))
 
 defn op (f:(BigInt, BigInt, BigInt) -> True|False, x:BigInt, y:BigInt) -> True|False :
@@ -377,7 +379,9 @@ defn check (msg:String, x:BigInt) :
 ;; check("B< ", BigIntLit(5, 3) << 10, BigIntLit(5 << 1, 13))
 ;; check("B< ", BigIntLit(5, 3) << 32, BigIntLit(5 << 1, 38))
 ;; check("B< ", BigIntLit("b1010") << 1, BigIntLit(10 << 1, 5))
-check("S1 ", BigIntLit("xfafa") << 16, BigIntLit("xfafa0000", 32))
+check("S1 ", BigIntLit("hfafa") << 16, BigIntLit("hfafa0000", 32))
+check("S1 ", BigIntLit(1,32) , BigIntLit(1,32))
+check("S1 ", BigIntLit(0,32) , BigIntLit(0,32))
 ;; check("B< ", BigIntLit(5, 3) << 64, BigIntLit(5 << 1, 67))
 ;; check("BN ", neg(BigIntLit(2, 8)), BigIntLit(-2, 8))
 check("S2 ", BigIntLit("b11111010") << 8, BigIntLit("b1111101000000000", 16))
diff --git a/src/main/stanza/errors.stanza b/src/main/stanza/errors.stanza
index 80ad3e56..6cdd1dca 100644
--- a/src/main/stanza/errors.stanza
+++ b/src/main/stanza/errors.stanza
@@ -278,7 +278,7 @@ public defn check-high-form (c:Circuit) -> Circuit :
                (e) : add(errors,InvalidIndex(info))
          (e:DoPrim) : check-high-form-primop(e,errors,info)
          (e:UIntValue) :
-            if value(e) < BigIntLit("0") : add(errors,NegUInt(info))
+            if value(e) < BigIntLit("h0",length(value(e))) : add(errors,NegUInt(info))
          (e) : false
       map(check-high-form-w{info,_:Width},e)
       map(check-high-form-t{info,_:Type},e)
diff --git a/src/main/stanza/ir-parser.stanza b/src/main/stanza/ir-parser.stanza
index b0ab8652..fdf4c383 100644
--- a/src/main/stanza/ir-parser.stanza
+++ b/src/main/stanza/ir-parser.stanza
@@ -195,7 +195,7 @@ defsyntax firrtl :
 
       type = (?t:#typeterm ?ops:#typeop ...) : apply-suffix-ops(t, ops)
       type = (?t:#clktype) : t
-      typeop = ((@get ?size:#int$)) : (fn (t) : VectorType(t, size[0]))
+      typeop = ((@get ?size:#int$)) : (fn (t) : VectorType(t, size))
       
       typeterm = (?t:#inttype) : t
       typeterm = ({?fs:#field ... ?rest ...}) :
@@ -214,10 +214,7 @@ defsyntax firrtl :
       accdir = (rdwr) : RDWR
 
    defrule width :
-      width = (?x:#int) : 
-         if num-words(x) == 1 : IntWidth(x[0])
-         else if num-words(x) == 2 : LongWidth(to-long(x[1]) * to-long(1 << 32) + to-long(x[0]))
-         else : IntWidth(x[0])
+      width = (?x:#int) : IntWidth(x)
       width = (?) : UnknownWidth()
 
    ;Main Statement Productions
@@ -257,7 +254,7 @@ defsyntax firrtl :
    defrule exp :
       ;Suffix Operators
       exp = (?x:#expterm ?ops:#expop ...) : apply-suffix-ops(x, ops)      
-      expop = ((@get ?f:#int)) : (fn (x) : Index(x, f[0], UnknownType()))
+      expop = ((@get ?f:#int)) : (fn (x) : Index(x, f, UnknownType()))
       expop = (. ?f:#id!) : (fn (x) : Subfield(x, f, UnknownType()))
       
       ;Prefix Operators
@@ -268,14 +265,14 @@ defsyntax firrtl :
 
       expterm = (?t:#inttype(?v:#int$)) :
          match(t) :
-            (t:UIntType) : UIntValue(BigIntLit(abs(v as Int)), width(t))
-            (t:SIntType) : SIntValue(BigIntLit(v as Int), width(t))
+            (t:UIntType) : UIntValue(BigIntLit(v as Int,32), width(t))
+            (t:SIntType) : SIntValue(BigIntLit(v as Int,32), width(t))
 
       expterm = (?op:#sym(?es:#exp ... ?ints:#int ... ?rest ...)) :
          if not empty?(rest) :
             FPE(rest, "Illegal operands to primitive operator.")
          match(primop(op)) :
-            (p:PrimOp) : DoPrim(p, es, map(get{_,0},ints), UnknownType())
+            (p:PrimOp) : DoPrim(p, es, ints, UnknownType())
             (p:False) : FPE(form, "Unrecognized primitive operator '~'." << [op])
       expterm = (?op:#sym) :
          Ref(op, UnknownType())
diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza
index 255354a3..db1a056e 100644
--- a/src/main/stanza/passes.stanza
+++ b/src/main/stanza/passes.stanza
@@ -1151,7 +1151,7 @@ defn expand-connect-indexed-stmt (s: Stmt,sh:HashTable<Symbol,Int>) -> Stmt :
                to-list $
                   for (i in 0 to false, l in locs(s)) stream : Conditionally(
                      info(s),
-                     equality(ref,UIntValue(BigIntLit(i),UnknownWidth())),
+                     equality(ref,UIntValue(BigIntLit(i,32),UnknownWidth())),
                      Connect(info(s),l,exp(s)),
                      EmptyStmt()
                   )
@@ -1165,7 +1165,7 @@ defn expand-connect-indexed-stmt (s: Stmt,sh:HashTable<Symbol,Int>) -> Stmt :
                to-list $
                   for (i in 1 to false, e in tail(exps(s))) stream : Conditionally(
                      info(s),
-                     equality(ref,UIntValue(BigIntLit(i),UnknownWidth())),
+                     equality(ref,UIntValue(BigIntLit(i,32),UnknownWidth())),
                      Connect(info(s),loc(s),e),
                      EmptyStmt()
                   )
@@ -1211,8 +1211,8 @@ public defmethod short-name (b:ExpandWhens) -> String : "expand-whens"
 
 ; ======== Expression Computation Library ===========
 
-val zero = UIntValue(BigIntLit("b0"),IntWidth(1))
-val one = UIntValue(BigIntLit("b1"),IntWidth(1))
+val zero = UIntValue(BigIntLit(0,32),IntWidth(1))
+val one = UIntValue(BigIntLit(1,32),IntWidth(1))
 
 defmethod equal? (e1:Expression,e2:Expression) -> True|False :
    match(e1,e2) :
@@ -1548,7 +1548,7 @@ public defn expand-whens (c:Circuit) -> Circuit :
                (e:Expression) : 
                   val ref = WRef(name(s),type(s),NodeKind(),FEMALE)
                   val en = to-exp(optimize $ get-write-enable(table[name(s)])) as Expression
-                  if en == UIntValue(BigIntLit("b1"),UnknownWidth()) : 
+                  if en == one : 
                      add{cons,_} $ Connect(info(s),ref,e)
                   else :
                      add{cons,_} $ Conditionally(info(s),en,Connect(info(s),ref,e),EmptyStmt())
@@ -1563,7 +1563,7 @@ public defn expand-whens (c:Circuit) -> Circuit :
                match(e) :
                   (e:Expression) : 
                      val en = (to-exp $ optimize $ get-write-enable(table[n])) as Expression
-                     if en == UIntValue(BigIntLit("b1"),UnknownWidth()) : 
+                     if en == one : 
                         add{cons,_} $ Connect(info(s),ref,e)
                      else :
                         add{cons,_} $ Conditionally(info(s),en,Connect(info(s),ref,e),EmptyStmt())
diff --git a/test/chisel3/Test.fir b/test/chisel3/Test.fir
index 1a39b93a..f0d8f80e 100644
--- a/test/chisel3/Test.fir
+++ b/test/chisel3/Test.fir
@@ -3,10 +3,16 @@
 
 circuit Test : 
   module Test : 
-     wire x : UInt
-     x := UInt(0)
-     x := UInt(1)
-     x := UInt(10)
-     x := UInt(21474836)
-     x := UInt("h21474836")
+     input clk : Clock
+     input reset : UInt<1>
+     input falling : UInt<1>
+
+     reg hold : UInt<100>, clk, UInt(1)
+
+     hold := UInt("h42")
+     when reset :
+        hold := UInt("h7f")
+     else :
+        when falling :
+           hold := UInt("h8f")