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authorSchuyler Eldridge2019-07-17 16:34:37 -0400
committerGitHub2019-07-17 16:34:37 -0400
commit5ae94e61d8f4ba80e101632cd69455f62c90cd38 (patch)
treeb60e2d1ee6d314441b645b58d0084e7e04e6034d
parent071feb8e3adf21e7147fc0b1c2d08ea8ccf3a5e6 (diff)
parent96a87a06e8ab6584e41d4201288023fe601ac2e0 (diff)
Merge pull request #1113 from freechipsproject/issue-1112
README.md Patches
-rw-r--r--README.md7
1 files changed, 4 insertions, 3 deletions
diff --git a/README.md b/README.md
index e1923ecf..66ea5894 100644
--- a/README.md
+++ b/README.md
@@ -33,8 +33,8 @@ To write a Firrtl transform, please start with the tutorial here: [src/main/scal
To run these examples:
```
sbt assembly
-./utils/bin/firrtl -td regress -tn rocket --custom-transforms tutorial.lesson1.AnalyzeCircuit
-./utils/bin/firrtl -td regress -tn rocket --custom-transforms tutorial.lesson2.AnalyzeCircuit
+./utils/bin/firrtl -td regress -i regress/RocketCore.fir --custom-transforms tutorial.lesson1.AnalyzeCircuit
+./utils/bin/firrtl -td regress -i regress/RocketCore.fir --custom-transforms tutorial.lesson2.AnalyzeCircuit
```
#### Other Tools
@@ -51,7 +51,8 @@ sbt assembly
##### Prerequisites
1. If not already installed, install [verilator](http://www.veripool.org/projects/verilator/wiki/Installing) (Requires at least v3.886)
- 2. If not already installed, install [sbt](http://www.scala-sbt.org/) (Requires at least v0.13.6)
+ 1. If not already installed, install [yosys](http://www.clifford.at/yosys/) (Requires at least v0.8)
+ 1. If not already installed, install [sbt](http://www.scala-sbt.org/) (Requires at least v0.13.6)
##### Installation
1. Clone the repository: