diff options
| author | azidar | 2015-09-30 09:29:38 -0700 |
|---|---|---|
| committer | azidar | 2015-09-30 09:29:38 -0700 |
| commit | 56852471179bee7549a2197735fa009fbb3036e7 (patch) | |
| tree | 7681c4eba2dfc4b67b625d75fb7106f5a6115f50 | |
| parent | 4fefd791eed5ede508a7d47a3f21bf7790d05514 (diff) | |
Moved To-Real-Ir earlier, so CheckWidth could happen before PadWidth
| -rw-r--r-- | src/main/stanza/compilers.stanza | 3 | ||||
| -rw-r--r-- | src/main/stanza/passes.stanza | 60 | ||||
| -rw-r--r-- | src/main/stanza/verilog.stanza | 4 | ||||
| -rw-r--r-- | test/passes/inline-indexers/simple7.fir | 13 | ||||
| -rw-r--r-- | test/passes/inline-indexers/simple8.fir | 240 | ||||
| -rw-r--r-- | test/passes/inline-indexers/simple9.fir | 3051 |
6 files changed, 3340 insertions, 31 deletions
diff --git a/src/main/stanza/compilers.stanza b/src/main/stanza/compilers.stanza index cc72bd14..0ea9a367 100644 --- a/src/main/stanza/compilers.stanza +++ b/src/main/stanza/compilers.stanza @@ -62,10 +62,11 @@ public defmethod passes (c:StandardVerilog) -> List<Pass> : CheckGenders() ;W ExpandWhens() ;W InferWidths() ;R + ToRealIR() ;W -> R + CheckWidths() ;R Pad() ;R ConstProp() ;R SplitExp() ;R - ToRealIR() ;W -> R CheckWidths() ;R CheckHighForm() ;R CheckLowForm() ;R diff --git a/src/main/stanza/passes.stanza b/src/main/stanza/passes.stanza index 5c045867..6d79e9c2 100644 --- a/src/main/stanza/passes.stanza +++ b/src/main/stanza/passes.stanza @@ -2242,6 +2242,33 @@ defn inline-instances (c:Circuit) : val top = (for m in modules(c) find : name(m) == main(c)) as InModule Circuit(info(c),list(InModule(info(top),name(top),ports(top),inline-inst(body(top)))),main(c)) +;================= Bring to Real IR ======================== +; Returns a new Circuit with only real IR nodes. +public defstruct ToRealIR <: Pass +public defmethod pass (b:ToRealIR) -> (Circuit -> Circuit) : to-real-ir +public defmethod name (b:ToRealIR) -> String : "Real IR" +public defmethod short-name (b:ToRealIR) -> String : "real-ir" + +defn to-real-ir (c:Circuit) : + defn to-exp (e:Expression) : + match(map(to-exp,e)) : + (e:WRef) : Ref(name(e), type(e)) + (e:WSubfield) : Subfield(exp(e),name(e),type(e)) + (e:WIndex) : error("Shouldn't be here") + (e) : e + defn to-stmt (s:Stmt) : + match(map(to-exp,s)) : + (e:DecFromIndexer) : error("Shouldn't be here") + (e:DecToIndexer) : error("Shouldn't be here") + (e) : map(to-stmt,e) + + Circuit(info(c),modules*, main(c)) where : + val modules* = + for m in modules(c) map : + match(m) : + (m:InModule) : InModule(info(m),name(m), ports(m), to-stmt(body(m))) + (m:ExModule) : m + ;================= Split Expressions ======================== ; Intended to only work on low firrtl @@ -2252,7 +2279,7 @@ public defmethod short-name (b:SplitExp) -> String : "split-expressions" defn full-name (e:Expression) -> Symbol|False : match(e) : - (e:WRef) : name(e) + (e:Ref) : name(e) (e) : false defn split-exp (c:Circuit) : @@ -2272,7 +2299,7 @@ defn split-exp (c:Circuit) : if n typeof False : firrtl-gensym(`F,sh) else : firrtl-gensym(n as Symbol,sh) add(v,DefNode(info,n*,map(split-exp-e{_,n,info},e))) - WRef(n*,type(e),NodeKind(),UNKNOWN-GENDER) + Ref(n*,type(e)) ;else : e (e) : map(split-exp-e{_,n,info},e) defn f (s:Stmt) -> False: split-exp-s(s,v,sh) @@ -2313,33 +2340,6 @@ defn split-exp (c:Circuit) : InModule(info(m),name(m),ports(m),Begin(to-list(v))) (m:ExModule) : m -;================= Bring to Real IR ======================== -; Returns a new Circuit with only real IR nodes. -public defstruct ToRealIR <: Pass -public defmethod pass (b:ToRealIR) -> (Circuit -> Circuit) : to-real-ir -public defmethod name (b:ToRealIR) -> String : "Real IR" -public defmethod short-name (b:ToRealIR) -> String : "real-ir" - -defn to-real-ir (c:Circuit) : - defn to-exp (e:Expression) : - match(map(to-exp,e)) : - (e:WRef) : Ref(name(e), type(e)) - (e:WSubfield) : Subfield(exp(e),name(e),type(e)) - (e:WIndex) : error("Shouldn't be here") - (e) : e - defn to-stmt (s:Stmt) : - match(map(to-exp,s)) : - (e:DecFromIndexer) : error("Shouldn't be here") - (e:DecToIndexer) : error("Shouldn't be here") - (e) : map(to-stmt,e) - - Circuit(info(c),modules*, main(c)) where : - val modules* = - for m in modules(c) map : - match(m) : - (m:InModule) : InModule(info(m),name(m), ports(m), to-stmt(body(m))) - (m:ExModule) : m - ;================= Special Rename ======================== ; Returns a new Circuit with only real IR nodes. public defstruct SpecialRename <: Pass : @@ -2452,7 +2452,7 @@ defn pad-widths-e (desired:Long,e:Expression) -> Expression : else : map(pad-widths-e{new-desired,_},e) trim-pad(desired, e*) - (e:WRef|WSubfield|WIndex) : + (e:Ref|Subfield|Index) : trim-pad(desired, e) (e:UIntValue) : val i = int-width!(type(e)) diff --git a/src/main/stanza/verilog.stanza b/src/main/stanza/verilog.stanza index c4a52d5e..1a495835 100644 --- a/src/main/stanza/verilog.stanza +++ b/src/main/stanza/verilog.stanza @@ -155,6 +155,10 @@ defn emit (e:Expression) -> String : for x in tail(args(e)) do : v = concat(v, [" ^ " emit(x)]) v + (e) : + println(["Expression:" e]) + error("Unknown expression") + defn emit-module (m:InModule) : diff --git a/test/passes/inline-indexers/simple7.fir b/test/passes/inline-indexers/simple7.fir new file mode 100644 index 00000000..cc9c6231 --- /dev/null +++ b/test/passes/inline-indexers/simple7.fir @@ -0,0 +1,13 @@ +; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s + +;CHECK: Inline Indexers +circuit top : + module top : + output out : UInt<64> + input index : UInt<1> + wire T_292 : UInt<64>[2] + T_292[0] := UInt(1) + T_292[1] := UInt(1) + infer accessor T_297 = T_292[index] + out := T_297 +;CHECK: Done! diff --git a/test/passes/inline-indexers/simple8.fir b/test/passes/inline-indexers/simple8.fir new file mode 100644 index 00000000..a02395a7 --- /dev/null +++ b/test/passes/inline-indexers/simple8.fir @@ -0,0 +1,240 @@ +; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s + +;CHECK: Inline Indexers +circuit top : + module top : + output resp : UInt<128>[4] + input write : {flip ready : UInt<1>, valid : UInt<1>, bits : {way_en : UInt<4>, addr : UInt<12>, wmask : UInt<2>, data : UInt<128>}} + input read : {flip ready : UInt<1>, valid : UInt<1>, bits : {way_en : UInt<4>, addr : UInt<12>}} + input clock : Clock + input reset : UInt<1> + + resp[0] := UInt<1>("h00") + resp[1] := UInt<1>("h00") + resp[2] := UInt<1>("h00") + resp[3] := UInt<1>("h00") + write.ready := UInt<1>("h00") + read.ready := UInt<1>("h00") + node waddr = shr(write.bits.addr, 4) + node raddr = shr(read.bits.addr, 4) + node T_65 = bits(write.bits.way_en, 1, 0) + node T_66 = bits(read.bits.way_en, 1, 0) + wire T_75 : UInt<128>[2] + T_75[0] := UInt<1>("h00") + T_75[1] := UInt<1>("h00") + reg T_81 : UInt<12>, clock, reset + when read.valid : + T_81 := read.bits.addr + skip + cmem T_84 : UInt<128>[256], clock + node T_86 = neq(T_65, UInt<1>("h00")) + node T_87 = and(T_86, write.valid) + node T_88 = bit(write.bits.wmask, 0) + node T_89 = and(T_87, T_88) + when T_89 : + node T_90 = bits(write.bits.data, 63, 0) + node T_91 = cat(T_90, T_90) + node T_92 = bit(T_65, 0) + node T_93 = bit(T_65, 1) + wire T_95 : UInt<1>[2] + T_95[0] := T_92 + T_95[1] := T_93 + node T_100 = subw(UInt<64>("h00"), T_95[0]) + node T_102 = subw(UInt<64>("h00"), T_95[1]) + wire T_104 : UInt<64>[2] + T_104[0] := T_100 + T_104[1] := T_102 + node T_108 = cat(T_104[1], T_104[0]) + infer accessor T_109 = T_84[waddr] + node T_110 = not(T_108) + node T_111 = and(T_109, T_110) + node T_112 = and(T_91, T_108) + node T_113 = or(T_111, T_112) + wire T_114 : UInt<128> + T_114 := UInt<1>("h00") + T_114 := T_113 + infer accessor T_116 = T_84[waddr] + T_116 := T_114 + skip + node T_118 = neq(T_66, UInt<1>("h00")) + node T_119 = and(T_118, read.valid) + reg T_120 : UInt<8>, clock, reset + when T_119 : + T_120 := raddr + skip + infer accessor T_121 = T_84[T_120] + T_75[0] := T_121 + cmem T_124 : UInt<128>[256], clock + node T_126 = neq(T_65, UInt<1>("h00")) + node T_127 = and(T_126, write.valid) + node T_128 = bit(write.bits.wmask, 1) + node T_129 = and(T_127, T_128) + when T_129 : + node T_130 = bits(write.bits.data, 127, 64) + node T_131 = cat(T_130, T_130) + node T_132 = bit(T_65, 0) + node T_133 = bit(T_65, 1) + wire T_135 : UInt<1>[2] + T_135[0] := T_132 + T_135[1] := T_133 + node T_140 = subw(UInt<64>("h00"), T_135[0]) + node T_142 = subw(UInt<64>("h00"), T_135[1]) + wire T_144 : UInt<64>[2] + T_144[0] := T_140 + T_144[1] := T_142 + node T_148 = cat(T_144[1], T_144[0]) + infer accessor T_149 = T_124[waddr] + node T_150 = not(T_148) + node T_151 = and(T_149, T_150) + node T_152 = and(T_131, T_148) + node T_153 = or(T_151, T_152) + wire T_154 : UInt<128> + T_154 := UInt<1>("h00") + T_154 := T_153 + infer accessor T_156 = T_124[waddr] + T_156 := T_154 + skip + node T_158 = neq(T_66, UInt<1>("h00")) + node T_159 = and(T_158, read.valid) + reg T_160 : UInt<8>, clock, reset + when T_159 : + T_160 := raddr + skip + infer accessor T_161 = T_124[T_160] + T_75[1] := T_161 + node T_162 = bits(T_75[0], 63, 0) + node T_163 = bits(T_75[1], 63, 0) + wire T_165 : UInt<64>[2] + T_165[0] := T_162 + T_165[1] := T_163 + node T_169 = bits(T_81, 3, 3) + infer accessor T_170 = T_165[T_169] + wire T_172 : UInt<64>[2] + T_172[0] := T_170 + T_172[1] := T_165[1] + node T_176 = cat(T_172[1], T_172[0]) + resp[0] := T_176 + node T_177 = bits(T_75[0], 127, 64) + node T_178 = bits(T_75[1], 127, 64) + wire T_180 : UInt<64>[2] + T_180[0] := T_177 + T_180[1] := T_178 + node T_184 = bits(T_81, 3, 3) + infer accessor T_185 = T_180[T_184] + wire T_187 : UInt<64>[2] + T_187[0] := T_185 + T_187[1] := T_180[1] + node T_191 = cat(T_187[1], T_187[0]) + resp[1] := T_191 + node T_192 = bits(write.bits.way_en, 3, 2) + node T_193 = bits(read.bits.way_en, 3, 2) + wire T_202 : UInt<128>[2] + T_202[0] := UInt<1>("h00") + T_202[1] := UInt<1>("h00") + reg T_208 : UInt<12>, clock, reset + when read.valid : + T_208 := read.bits.addr + skip + cmem T_211 : UInt<128>[256], clock + node T_213 = neq(T_192, UInt<1>("h00")) + node T_214 = and(T_213, write.valid) + node T_215 = bit(write.bits.wmask, 0) + node T_216 = and(T_214, T_215) + when T_216 : + node T_217 = bits(write.bits.data, 63, 0) + node T_218 = cat(T_217, T_217) + node T_219 = bit(T_192, 0) + node T_220 = bit(T_192, 1) + wire T_222 : UInt<1>[2] + T_222[0] := T_219 + T_222[1] := T_220 + node T_227 = subw(UInt<64>("h00"), T_222[0]) + node T_229 = subw(UInt<64>("h00"), T_222[1]) + wire T_231 : UInt<64>[2] + T_231[0] := T_227 + T_231[1] := T_229 + node T_235 = cat(T_231[1], T_231[0]) + infer accessor T_236 = T_211[waddr] + node T_237 = not(T_235) + node T_238 = and(T_236, T_237) + node T_239 = and(T_218, T_235) + node T_240 = or(T_238, T_239) + wire T_241 : UInt<128> + T_241 := UInt<1>("h00") + T_241 := T_240 + infer accessor T_243 = T_211[waddr] + T_243 := T_241 + skip + node T_245 = neq(T_193, UInt<1>("h00")) + node T_246 = and(T_245, read.valid) + reg T_247 : UInt<8>, clock, reset + when T_246 : + T_247 := raddr + skip + infer accessor T_248 = T_211[T_247] + T_202[0] := T_248 + cmem T_251 : UInt<128>[256], clock + node T_253 = neq(T_192, UInt<1>("h00")) + node T_254 = and(T_253, write.valid) + node T_255 = bit(write.bits.wmask, 1) + node T_256 = and(T_254, T_255) + when T_256 : + node T_257 = bits(write.bits.data, 127, 64) + node T_258 = cat(T_257, T_257) + node T_259 = bit(T_192, 0) + node T_260 = bit(T_192, 1) + wire T_262 : UInt<1>[2] + T_262[0] := T_259 + T_262[1] := T_260 + node T_267 = subw(UInt<64>("h00"), T_262[0]) + node T_269 = subw(UInt<64>("h00"), T_262[1]) + wire T_271 : UInt<64>[2] + T_271[0] := T_267 + T_271[1] := T_269 + node T_275 = cat(T_271[1], T_271[0]) + infer accessor T_276 = T_251[waddr] + node T_277 = not(T_275) + node T_278 = and(T_276, T_277) + node T_279 = and(T_258, T_275) + node T_280 = or(T_278, T_279) + wire T_281 : UInt<128> + T_281 := UInt<1>("h00") + T_281 := T_280 + infer accessor T_283 = T_251[waddr] + T_283 := T_281 + skip + node T_285 = neq(T_193, UInt<1>("h00")) + node T_286 = and(T_285, read.valid) + reg T_287 : UInt<8>, clock, reset + when T_286 : + T_287 := raddr + skip + infer accessor T_288 = T_251[T_287] + T_202[1] := T_288 + node T_289 = bits(T_202[0], 63, 0) + node T_290 = bits(T_202[1], 63, 0) + wire T_292 : UInt<64>[2] + T_292[0] := T_289 + T_292[1] := T_290 + node T_296 = bits(T_208, 3, 3) + infer accessor T_297 = T_292[T_296] + wire T_299 : UInt<64>[2] + T_299[0] := T_297 + T_299[1] := T_292[1] + node T_303 = cat(T_299[1], T_299[0]) + resp[2] := T_303 + node T_304 = bits(T_202[0], 127, 64) + node T_305 = bits(T_202[1], 127, 64) + wire T_307 : UInt<64>[2] + T_307[0] := T_304 + T_307[1] := T_305 + node T_311 = bits(T_208, 3, 3) + infer accessor T_312 = T_307[T_311] + wire T_314 : UInt<64>[2] + T_314[0] := T_312 + T_314[1] := T_307[1] + node T_318 = cat(T_314[1], T_314[0]) + resp[3] := T_318 + read.ready := UInt<1>("h01") + write.ready := UInt<1>("h01") +;CHECK: Done! diff --git a/test/passes/inline-indexers/simple9.fir b/test/passes/inline-indexers/simple9.fir new file mode 100644 index 00000000..f009ef1b --- /dev/null +++ b/test/passes/inline-indexers/simple9.fir @@ -0,0 +1,3051 @@ +; RUN: firrtl -i %s -o %s.v -X verilog -p c 2>&1 | tee %s.out | FileCheck %s + +;CHECK: Inline Indexers +circuit top : + module top : + input invalidate : UInt<1> + input ras_update : {valid : UInt<1>, bits : {isCall : UInt<1>, isReturn : UInt<1>, returnAddr : UInt<39>, prediction : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<1>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}}} + input bht_update : {valid : UInt<1>, bits : {prediction : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<1>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}, pc : UInt<39>, taken : UInt<1>, mispredict : UInt<1>}} + input btb_update : {valid : UInt<1>, bits : {prediction : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<1>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}, pc : UInt<39>, target : UInt<39>, taken : UInt<1>, isJump : UInt<1>, isReturn : UInt<1>, br_pc : UInt<39>}} + output resp : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<1>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}} + input req : {valid : UInt<1>, bits : {addr : UInt<39>}} + input clock : Clock + input reset : UInt<1> + + resp.bits.bht.value := UInt<1>("h00") + resp.bits.bht.history := UInt<1>("h00") + resp.bits.entry := UInt<1>("h00") + resp.bits.target := UInt<1>("h00") + resp.bits.bridx := UInt<1>("h00") + resp.bits.mask := UInt<1>("h00") + resp.bits.taken := UInt<1>("h00") + resp.valid := UInt<1>("h00") + reg idxValid : UInt<62>, clock, reset + onreset idxValid := UInt<62>("h00") + cmem idxs : UInt<12>[62], clock + cmem idxPages : UInt<3>[62], clock + cmem tgts : UInt<12>[62], clock + cmem tgtPages : UInt<3>[62], clock + cmem pages : UInt<27>[6], clock + reg pageValid : UInt<6>, clock, reset + onreset pageValid := UInt<6>("h00") + infer accessor T_589 = idxPages[UInt<1>("h00")] + node T_591 = dshl(UInt<1>("h01"), T_589) + node T_592 = bits(T_591, 5, 0) + infer accessor T_594 = idxPages[UInt<1>("h01")] + node T_596 = dshl(UInt<1>("h01"), T_594) + node T_597 = bits(T_596, 5, 0) + infer accessor T_599 = idxPages[UInt<2>("h02")] + node T_601 = dshl(UInt<1>("h01"), T_599) + node T_602 = bits(T_601, 5, 0) + infer accessor T_604 = idxPages[UInt<2>("h03")] + node T_606 = dshl(UInt<1>("h01"), T_604) + node T_607 = bits(T_606, 5, 0) + infer accessor T_609 = idxPages[UInt<3>("h04")] + node T_611 = dshl(UInt<1>("h01"), T_609) + node T_612 = bits(T_611, 5, 0) + infer accessor T_614 = idxPages[UInt<3>("h05")] + node T_616 = dshl(UInt<1>("h01"), T_614) + node T_617 = bits(T_616, 5, 0) + infer accessor T_619 = idxPages[UInt<3>("h06")] + node T_621 = dshl(UInt<1>("h01"), T_619) + node T_622 = bits(T_621, 5, 0) + infer accessor T_624 = idxPages[UInt<3>("h07")] + node T_626 = dshl(UInt<1>("h01"), T_624) + node T_627 = bits(T_626, 5, 0) + infer accessor T_629 = idxPages[UInt<4>("h08")] + node T_631 = dshl(UInt<1>("h01"), T_629) + node T_632 = bits(T_631, 5, 0) + infer accessor T_634 = idxPages[UInt<4>("h09")] + node T_636 = dshl(UInt<1>("h01"), T_634) + node T_637 = bits(T_636, 5, 0) + infer accessor T_639 = idxPages[UInt<4>("h0a")] + node T_641 = dshl(UInt<1>("h01"), T_639) + node T_642 = bits(T_641, 5, 0) + infer accessor T_644 = idxPages[UInt<4>("h0b")] + node T_646 = dshl(UInt<1>("h01"), T_644) + node T_647 = bits(T_646, 5, 0) + infer accessor T_649 = idxPages[UInt<4>("h0c")] + node T_651 = dshl(UInt<1>("h01"), T_649) + node T_652 = bits(T_651, 5, 0) + infer accessor T_654 = idxPages[UInt<4>("h0d")] + node T_656 = dshl(UInt<1>("h01"), T_654) + node T_657 = bits(T_656, 5, 0) + infer accessor T_659 = idxPages[UInt<4>("h0e")] + node T_661 = dshl(UInt<1>("h01"), T_659) + node T_662 = bits(T_661, 5, 0) + infer accessor T_664 = idxPages[UInt<4>("h0f")] + node T_666 = dshl(UInt<1>("h01"), T_664) + node T_667 = bits(T_666, 5, 0) + infer accessor T_669 = idxPages[UInt<5>("h010")] + node T_671 = dshl(UInt<1>("h01"), T_669) + node T_672 = bits(T_671, 5, 0) + infer accessor T_674 = idxPages[UInt<5>("h011")] + node T_676 = dshl(UInt<1>("h01"), T_674) + node T_677 = bits(T_676, 5, 0) + infer accessor T_679 = idxPages[UInt<5>("h012")] + node T_681 = dshl(UInt<1>("h01"), T_679) + node T_682 = bits(T_681, 5, 0) + infer accessor T_684 = idxPages[UInt<5>("h013")] + node T_686 = dshl(UInt<1>("h01"), T_684) + node T_687 = bits(T_686, 5, 0) + infer accessor T_689 = idxPages[UInt<5>("h014")] + node T_691 = dshl(UInt<1>("h01"), T_689) + node T_692 = bits(T_691, 5, 0) + infer accessor T_694 = idxPages[UInt<5>("h015")] + node T_696 = dshl(UInt<1>("h01"), T_694) + node T_697 = bits(T_696, 5, 0) + infer accessor T_699 = idxPages[UInt<5>("h016")] + node T_701 = dshl(UInt<1>("h01"), T_699) + node T_702 = bits(T_701, 5, 0) + infer accessor T_704 = idxPages[UInt<5>("h017")] + node T_706 = dshl(UInt<1>("h01"), T_704) + node T_707 = bits(T_706, 5, 0) + infer accessor T_709 = idxPages[UInt<5>("h018")] + node T_711 = dshl(UInt<1>("h01"), T_709) + node T_712 = bits(T_711, 5, 0) + infer accessor T_714 = idxPages[UInt<5>("h019")] + node T_716 = dshl(UInt<1>("h01"), T_714) + node T_717 = bits(T_716, 5, 0) + infer accessor T_719 = idxPages[UInt<5>("h01a")] + node T_721 = dshl(UInt<1>("h01"), T_719) + node T_722 = bits(T_721, 5, 0) + infer accessor T_724 = idxPages[UInt<5>("h01b")] + node T_726 = dshl(UInt<1>("h01"), T_724) + node T_727 = bits(T_726, 5, 0) + infer accessor T_729 = idxPages[UInt<5>("h01c")] + node T_731 = dshl(UInt<1>("h01"), T_729) + node T_732 = bits(T_731, 5, 0) + infer accessor T_734 = idxPages[UInt<5>("h01d")] + node T_736 = dshl(UInt<1>("h01"), T_734) + node T_737 = bits(T_736, 5, 0) + infer accessor T_739 = idxPages[UInt<5>("h01e")] + node T_741 = dshl(UInt<1>("h01"), T_739) + node T_742 = bits(T_741, 5, 0) + infer accessor T_744 = idxPages[UInt<5>("h01f")] + node T_746 = dshl(UInt<1>("h01"), T_744) + node T_747 = bits(T_746, 5, 0) + infer accessor T_749 = idxPages[UInt<6>("h020")] + node T_751 = dshl(UInt<1>("h01"), T_749) + node T_752 = bits(T_751, 5, 0) + infer accessor T_754 = idxPages[UInt<6>("h021")] + node T_756 = dshl(UInt<1>("h01"), T_754) + node T_757 = bits(T_756, 5, 0) + infer accessor T_759 = idxPages[UInt<6>("h022")] + node T_761 = dshl(UInt<1>("h01"), T_759) + node T_762 = bits(T_761, 5, 0) + infer accessor T_764 = idxPages[UInt<6>("h023")] + node T_766 = dshl(UInt<1>("h01"), T_764) + node T_767 = bits(T_766, 5, 0) + infer accessor T_769 = idxPages[UInt<6>("h024")] + node T_771 = dshl(UInt<1>("h01"), T_769) + node T_772 = bits(T_771, 5, 0) + infer accessor T_774 = idxPages[UInt<6>("h025")] + node T_776 = dshl(UInt<1>("h01"), T_774) + node T_777 = bits(T_776, 5, 0) + infer accessor T_779 = idxPages[UInt<6>("h026")] + node T_781 = dshl(UInt<1>("h01"), T_779) + node T_782 = bits(T_781, 5, 0) + infer accessor T_784 = idxPages[UInt<6>("h027")] + node T_786 = dshl(UInt<1>("h01"), T_784) + node T_787 = bits(T_786, 5, 0) + infer accessor T_789 = idxPages[UInt<6>("h028")] + node T_791 = dshl(UInt<1>("h01"), T_789) + node T_792 = bits(T_791, 5, 0) + infer accessor T_794 = idxPages[UInt<6>("h029")] + node T_796 = dshl(UInt<1>("h01"), T_794) + node T_797 = bits(T_796, 5, 0) + infer accessor T_799 = idxPages[UInt<6>("h02a")] + node T_801 = dshl(UInt<1>("h01"), T_799) + node T_802 = bits(T_801, 5, 0) + infer accessor T_804 = idxPages[UInt<6>("h02b")] + node T_806 = dshl(UInt<1>("h01"), T_804) + node T_807 = bits(T_806, 5, 0) + infer accessor T_809 = idxPages[UInt<6>("h02c")] + node T_811 = dshl(UInt<1>("h01"), T_809) + node T_812 = bits(T_811, 5, 0) + infer accessor T_814 = idxPages[UInt<6>("h02d")] + node T_816 = dshl(UInt<1>("h01"), T_814) + node T_817 = bits(T_816, 5, 0) + infer accessor T_819 = idxPages[UInt<6>("h02e")] + node T_821 = dshl(UInt<1>("h01"), T_819) + node T_822 = bits(T_821, 5, 0) + infer accessor T_824 = idxPages[UInt<6>("h02f")] + node T_826 = dshl(UInt<1>("h01"), T_824) + node T_827 = bits(T_826, 5, 0) + infer accessor T_829 = idxPages[UInt<6>("h030")] + node T_831 = dshl(UInt<1>("h01"), T_829) + node T_832 = bits(T_831, 5, 0) + infer accessor T_834 = idxPages[UInt<6>("h031")] + node T_836 = dshl(UInt<1>("h01"), T_834) + node T_837 = bits(T_836, 5, 0) + infer accessor T_839 = idxPages[UInt<6>("h032")] + node T_841 = dshl(UInt<1>("h01"), T_839) + node T_842 = bits(T_841, 5, 0) + infer accessor T_844 = idxPages[UInt<6>("h033")] + node T_846 = dshl(UInt<1>("h01"), T_844) + node T_847 = bits(T_846, 5, 0) + infer accessor T_849 = idxPages[UInt<6>("h034")] + node T_851 = dshl(UInt<1>("h01"), T_849) + node T_852 = bits(T_851, 5, 0) + infer accessor T_854 = idxPages[UInt<6>("h035")] + node T_856 = dshl(UInt<1>("h01"), T_854) + node T_857 = bits(T_856, 5, 0) + infer accessor T_859 = idxPages[UInt<6>("h036")] + node T_861 = dshl(UInt<1>("h01"), T_859) + node T_862 = bits(T_861, 5, 0) + infer accessor T_864 = idxPages[UInt<6>("h037")] + node T_866 = dshl(UInt<1>("h01"), T_864) + node T_867 = bits(T_866, 5, 0) + infer accessor T_869 = idxPages[UInt<6>("h038")] + node T_871 = dshl(UInt<1>("h01"), T_869) + node T_872 = bits(T_871, 5, 0) + infer accessor T_874 = idxPages[UInt<6>("h039")] + node T_876 = dshl(UInt<1>("h01"), T_874) + node T_877 = bits(T_876, 5, 0) + infer accessor T_879 = idxPages[UInt<6>("h03a")] + node T_881 = dshl(UInt<1>("h01"), T_879) + node T_882 = bits(T_881, 5, 0) + infer accessor T_884 = idxPages[UInt<6>("h03b")] + node T_886 = dshl(UInt<1>("h01"), T_884) + node T_887 = bits(T_886, 5, 0) + infer accessor T_889 = idxPages[UInt<6>("h03c")] + node T_891 = dshl(UInt<1>("h01"), T_889) + node T_892 = bits(T_891, 5, 0) + infer accessor T_894 = idxPages[UInt<6>("h03d")] + node T_896 = dshl(UInt<1>("h01"), T_894) + node T_897 = bits(T_896, 5, 0) + infer accessor T_899 = tgtPages[UInt<1>("h00")] + node T_901 = dshl(UInt<1>("h01"), T_899) + node T_902 = bits(T_901, 5, 0) + infer accessor T_904 = tgtPages[UInt<1>("h01")] + node T_906 = dshl(UInt<1>("h01"), T_904) + node T_907 = bits(T_906, 5, 0) + infer accessor T_909 = tgtPages[UInt<2>("h02")] + node T_911 = dshl(UInt<1>("h01"), T_909) + node T_912 = bits(T_911, 5, 0) + infer accessor T_914 = tgtPages[UInt<2>("h03")] + node T_916 = dshl(UInt<1>("h01"), T_914) + node T_917 = bits(T_916, 5, 0) + infer accessor T_919 = tgtPages[UInt<3>("h04")] + node T_921 = dshl(UInt<1>("h01"), T_919) + node T_922 = bits(T_921, 5, 0) + infer accessor T_924 = tgtPages[UInt<3>("h05")] + node T_926 = dshl(UInt<1>("h01"), T_924) + node T_927 = bits(T_926, 5, 0) + infer accessor T_929 = tgtPages[UInt<3>("h06")] + node T_931 = dshl(UInt<1>("h01"), T_929) + node T_932 = bits(T_931, 5, 0) + infer accessor T_934 = tgtPages[UInt<3>("h07")] + node T_936 = dshl(UInt<1>("h01"), T_934) + node T_937 = bits(T_936, 5, 0) + infer accessor T_939 = tgtPages[UInt<4>("h08")] + node T_941 = dshl(UInt<1>("h01"), T_939) + node T_942 = bits(T_941, 5, 0) + infer accessor T_944 = tgtPages[UInt<4>("h09")] + node T_946 = dshl(UInt<1>("h01"), T_944) + node T_947 = bits(T_946, 5, 0) + infer accessor T_949 = tgtPages[UInt<4>("h0a")] + node T_951 = dshl(UInt<1>("h01"), T_949) + node T_952 = bits(T_951, 5, 0) + infer accessor T_954 = tgtPages[UInt<4>("h0b")] + node T_956 = dshl(UInt<1>("h01"), T_954) + node T_957 = bits(T_956, 5, 0) + infer accessor T_959 = tgtPages[UInt<4>("h0c")] + node T_961 = dshl(UInt<1>("h01"), T_959) + node T_962 = bits(T_961, 5, 0) + infer accessor T_964 = tgtPages[UInt<4>("h0d")] + node T_966 = dshl(UInt<1>("h01"), T_964) + node T_967 = bits(T_966, 5, 0) + infer accessor T_969 = tgtPages[UInt<4>("h0e")] + node T_971 = dshl(UInt<1>("h01"), T_969) + node T_972 = bits(T_971, 5, 0) + infer accessor T_974 = tgtPages[UInt<4>("h0f")] + node T_976 = dshl(UInt<1>("h01"), T_974) + node T_977 = bits(T_976, 5, 0) + infer accessor T_979 = tgtPages[UInt<5>("h010")] + node T_981 = dshl(UInt<1>("h01"), T_979) + node T_982 = bits(T_981, 5, 0) + infer accessor T_984 = tgtPages[UInt<5>("h011")] + node T_986 = dshl(UInt<1>("h01"), T_984) + node T_987 = bits(T_986, 5, 0) + infer accessor T_989 = tgtPages[UInt<5>("h012")] + node T_991 = dshl(UInt<1>("h01"), T_989) + node T_992 = bits(T_991, 5, 0) + infer accessor T_994 = tgtPages[UInt<5>("h013")] + node T_996 = dshl(UInt<1>("h01"), T_994) + node T_997 = bits(T_996, 5, 0) + infer accessor T_999 = tgtPages[UInt<5>("h014")] + node T_1001 = dshl(UInt<1>("h01"), T_999) + node T_1002 = bits(T_1001, 5, 0) + infer accessor T_1004 = tgtPages[UInt<5>("h015")] + node T_1006 = dshl(UInt<1>("h01"), T_1004) + node T_1007 = bits(T_1006, 5, 0) + infer accessor T_1009 = tgtPages[UInt<5>("h016")] + node T_1011 = dshl(UInt<1>("h01"), T_1009) + node T_1012 = bits(T_1011, 5, 0) + infer accessor T_1014 = tgtPages[UInt<5>("h017")] + node T_1016 = dshl(UInt<1>("h01"), T_1014) + node T_1017 = bits(T_1016, 5, 0) + infer accessor T_1019 = tgtPages[UInt<5>("h018")] + node T_1021 = dshl(UInt<1>("h01"), T_1019) + node T_1022 = bits(T_1021, 5, 0) + infer accessor T_1024 = tgtPages[UInt<5>("h019")] + node T_1026 = dshl(UInt<1>("h01"), T_1024) + node T_1027 = bits(T_1026, 5, 0) + infer accessor T_1029 = tgtPages[UInt<5>("h01a")] + node T_1031 = dshl(UInt<1>("h01"), T_1029) + node T_1032 = bits(T_1031, 5, 0) + infer accessor T_1034 = tgtPages[UInt<5>("h01b")] + node T_1036 = dshl(UInt<1>("h01"), T_1034) + node T_1037 = bits(T_1036, 5, 0) + infer accessor T_1039 = tgtPages[UInt<5>("h01c")] + node T_1041 = dshl(UInt<1>("h01"), T_1039) + node T_1042 = bits(T_1041, 5, 0) + infer accessor T_1044 = tgtPages[UInt<5>("h01d")] + node T_1046 = dshl(UInt<1>("h01"), T_1044) + node T_1047 = bits(T_1046, 5, 0) + infer accessor T_1049 = tgtPages[UInt<5>("h01e")] + node T_1051 = dshl(UInt<1>("h01"), T_1049) + node T_1052 = bits(T_1051, 5, 0) + infer accessor T_1054 = tgtPages[UInt<5>("h01f")] + node T_1056 = dshl(UInt<1>("h01"), T_1054) + node T_1057 = bits(T_1056, 5, 0) + infer accessor T_1059 = tgtPages[UInt<6>("h020")] + node T_1061 = dshl(UInt<1>("h01"), T_1059) + node T_1062 = bits(T_1061, 5, 0) + infer accessor T_1064 = tgtPages[UInt<6>("h021")] + node T_1066 = dshl(UInt<1>("h01"), T_1064) + node T_1067 = bits(T_1066, 5, 0) + infer accessor T_1069 = tgtPages[UInt<6>("h022")] + node T_1071 = dshl(UInt<1>("h01"), T_1069) + node T_1072 = bits(T_1071, 5, 0) + infer accessor T_1074 = tgtPages[UInt<6>("h023")] + node T_1076 = dshl(UInt<1>("h01"), T_1074) + node T_1077 = bits(T_1076, 5, 0) + infer accessor T_1079 = tgtPages[UInt<6>("h024")] + node T_1081 = dshl(UInt<1>("h01"), T_1079) + node T_1082 = bits(T_1081, 5, 0) + infer accessor T_1084 = tgtPages[UInt<6>("h025")] + node T_1086 = dshl(UInt<1>("h01"), T_1084) + node T_1087 = bits(T_1086, 5, 0) + infer accessor T_1089 = tgtPages[UInt<6>("h026")] + node T_1091 = dshl(UInt<1>("h01"), T_1089) + node T_1092 = bits(T_1091, 5, 0) + infer accessor T_1094 = tgtPages[UInt<6>("h027")] + node T_1096 = dshl(UInt<1>("h01"), T_1094) + node T_1097 = bits(T_1096, 5, 0) + infer accessor T_1099 = tgtPages[UInt<6>("h028")] + node T_1101 = dshl(UInt<1>("h01"), T_1099) + node T_1102 = bits(T_1101, 5, 0) + infer accessor T_1104 = tgtPages[UInt<6>("h029")] + node T_1106 = dshl(UInt<1>("h01"), T_1104) + node T_1107 = bits(T_1106, 5, 0) + infer accessor T_1109 = tgtPages[UInt<6>("h02a")] + node T_1111 = dshl(UInt<1>("h01"), T_1109) + node T_1112 = bits(T_1111, 5, 0) + infer accessor T_1114 = tgtPages[UInt<6>("h02b")] + node T_1116 = dshl(UInt<1>("h01"), T_1114) + node T_1117 = bits(T_1116, 5, 0) + infer accessor T_1119 = tgtPages[UInt<6>("h02c")] + node T_1121 = dshl(UInt<1>("h01"), T_1119) + node T_1122 = bits(T_1121, 5, 0) + infer accessor T_1124 = tgtPages[UInt<6>("h02d")] + node T_1126 = dshl(UInt<1>("h01"), T_1124) + node T_1127 = bits(T_1126, 5, 0) + infer accessor T_1129 = tgtPages[UInt<6>("h02e")] + node T_1131 = dshl(UInt<1>("h01"), T_1129) + node T_1132 = bits(T_1131, 5, 0) + infer accessor T_1134 = tgtPages[UInt<6>("h02f")] + node T_1136 = dshl(UInt<1>("h01"), T_1134) + node T_1137 = bits(T_1136, 5, 0) + infer accessor T_1139 = tgtPages[UInt<6>("h030")] + node T_1141 = dshl(UInt<1>("h01"), T_1139) + node T_1142 = bits(T_1141, 5, 0) + infer accessor T_1144 = tgtPages[UInt<6>("h031")] + node T_1146 = dshl(UInt<1>("h01"), T_1144) + node T_1147 = bits(T_1146, 5, 0) + infer accessor T_1149 = tgtPages[UInt<6>("h032")] + node T_1151 = dshl(UInt<1>("h01"), T_1149) + node T_1152 = bits(T_1151, 5, 0) + infer accessor T_1154 = tgtPages[UInt<6>("h033")] + node T_1156 = dshl(UInt<1>("h01"), T_1154) + node T_1157 = bits(T_1156, 5, 0) + infer accessor T_1159 = tgtPages[UInt<6>("h034")] + node T_1161 = dshl(UInt<1>("h01"), T_1159) + node T_1162 = bits(T_1161, 5, 0) + infer accessor T_1164 = tgtPages[UInt<6>("h035")] + node T_1166 = dshl(UInt<1>("h01"), T_1164) + node T_1167 = bits(T_1166, 5, 0) + infer accessor T_1169 = tgtPages[UInt<6>("h036")] + node T_1171 = dshl(UInt<1>("h01"), T_1169) + node T_1172 = bits(T_1171, 5, 0) + infer accessor T_1174 = tgtPages[UInt<6>("h037")] + node T_1176 = dshl(UInt<1>("h01"), T_1174) + node T_1177 = bits(T_1176, 5, 0) + infer accessor T_1179 = tgtPages[UInt<6>("h038")] + node T_1181 = dshl(UInt<1>("h01"), T_1179) + node T_1182 = bits(T_1181, 5, 0) + infer accessor T_1184 = tgtPages[UInt<6>("h039")] + node T_1186 = dshl(UInt<1>("h01"), T_1184) + node T_1187 = bits(T_1186, 5, 0) + infer accessor T_1189 = tgtPages[UInt<6>("h03a")] + node T_1191 = dshl(UInt<1>("h01"), T_1189) + node T_1192 = bits(T_1191, 5, 0) + infer accessor T_1194 = tgtPages[UInt<6>("h03b")] + node T_1196 = dshl(UInt<1>("h01"), T_1194) + node T_1197 = bits(T_1196, 5, 0) + infer accessor T_1199 = tgtPages[UInt<6>("h03c")] + node T_1201 = dshl(UInt<1>("h01"), T_1199) + node T_1202 = bits(T_1201, 5, 0) + infer accessor T_1204 = tgtPages[UInt<6>("h03d")] + node T_1206 = dshl(UInt<1>("h01"), T_1204) + node T_1207 = bits(T_1206, 5, 0) + reg useRAS : UInt<1>[62], clock, reset + reg isJump : UInt<1>[62], clock, reset + cmem brIdx : UInt<1>[62], clock + reg T_1477 : UInt<1>, clock, reset + onreset T_1477 := UInt<1>("h00") + T_1477 := btb_update.valid + reg T_1478 : {prediction : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<1>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}, pc : UInt<39>, target : UInt<39>, taken : UInt<1>, isJump : UInt<1>, isReturn : UInt<1>, br_pc : UInt<39>}, clock, reset + when btb_update.valid : + T_1478 <> btb_update.bits + skip + wire r_btb_update : {valid : UInt<1>, bits : {prediction : {valid : UInt<1>, bits : {taken : UInt<1>, mask : UInt<1>, bridx : UInt<1>, target : UInt<39>, entry : UInt<6>, bht : {history : UInt<7>, value : UInt<2>}}}, pc : UInt<39>, target : UInt<39>, taken : UInt<1>, isJump : UInt<1>, isReturn : UInt<1>, br_pc : UInt<39>}} + r_btb_update.bits.br_pc := UInt<1>("h00") + r_btb_update.bits.isReturn := UInt<1>("h00") + r_btb_update.bits.isJump := UInt<1>("h00") + r_btb_update.bits.taken := UInt<1>("h00") + r_btb_update.bits.target := UInt<1>("h00") + r_btb_update.bits.pc := UInt<1>("h00") + r_btb_update.bits.prediction.bits.bht.value := UInt<1>("h00") + r_btb_update.bits.prediction.bits.bht.history := UInt<1>("h00") + r_btb_update.bits.prediction.bits.entry := UInt<1>("h00") + r_btb_update.bits.prediction.bits.target := UInt<1>("h00") + r_btb_update.bits.prediction.bits.bridx := UInt<1>("h00") + r_btb_update.bits.prediction.bits.mask := UInt<1>("h00") + r_btb_update.bits.prediction.bits.taken := UInt<1>("h00") + r_btb_update.bits.prediction.valid := UInt<1>("h00") + r_btb_update.valid := UInt<1>("h00") + r_btb_update.valid := T_1477 + r_btb_update.bits <> T_1478 + node T_1677 = shr(req.bits.addr, 12) + infer accessor T_1679 = pages[UInt<1>("h00")] + node T_1680 = eq(T_1679, T_1677) + infer accessor T_1682 = pages[UInt<1>("h01")] + node T_1683 = eq(T_1682, T_1677) + infer accessor T_1685 = pages[UInt<2>("h02")] + node T_1686 = eq(T_1685, T_1677) + infer accessor T_1688 = pages[UInt<2>("h03")] + node T_1689 = eq(T_1688, T_1677) + infer accessor T_1691 = pages[UInt<3>("h04")] + node T_1692 = eq(T_1691, T_1677) + infer accessor T_1694 = pages[UInt<3>("h05")] + node T_1695 = eq(T_1694, T_1677) + wire T_1697 : UInt<1>[6] + T_1697[0] := T_1680 + T_1697[1] := T_1683 + T_1697[2] := T_1686 + T_1697[3] := T_1689 + T_1697[4] := T_1692 + T_1697[5] := T_1695 + node T_1705 = cat(T_1697[4], T_1697[3]) + node T_1706 = cat(T_1697[5], T_1705) + node T_1707 = cat(T_1697[1], T_1697[0]) + node T_1708 = cat(T_1697[2], T_1707) + node T_1709 = cat(T_1706, T_1708) + node pageHit = and(T_1709, pageValid) + node T_1711 = bits(req.bits.addr, 11, 0) + infer accessor T_1713 = idxs[UInt<1>("h00")] + node T_1714 = eq(T_1713, T_1711) + infer accessor T_1716 = idxs[UInt<1>("h01")] + node T_1717 = eq(T_1716, T_1711) + infer accessor T_1719 = idxs[UInt<2>("h02")] + node T_1720 = eq(T_1719, T_1711) + infer accessor T_1722 = idxs[UInt<2>("h03")] + node T_1723 = eq(T_1722, T_1711) + infer accessor T_1725 = idxs[UInt<3>("h04")] + node T_1726 = eq(T_1725, T_1711) + infer accessor T_1728 = idxs[UInt<3>("h05")] + node T_1729 = eq(T_1728, T_1711) + infer accessor T_1731 = idxs[UInt<3>("h06")] + node T_1732 = eq(T_1731, T_1711) + infer accessor T_1734 = idxs[UInt<3>("h07")] + node T_1735 = eq(T_1734, T_1711) + infer accessor T_1737 = idxs[UInt<4>("h08")] + node T_1738 = eq(T_1737, T_1711) + infer accessor T_1740 = idxs[UInt<4>("h09")] + node T_1741 = eq(T_1740, T_1711) + infer accessor T_1743 = idxs[UInt<4>("h0a")] + node T_1744 = eq(T_1743, T_1711) + infer accessor T_1746 = idxs[UInt<4>("h0b")] + node T_1747 = eq(T_1746, T_1711) + infer accessor T_1749 = idxs[UInt<4>("h0c")] + node T_1750 = eq(T_1749, T_1711) + infer accessor T_1752 = idxs[UInt<4>("h0d")] + node T_1753 = eq(T_1752, T_1711) + infer accessor T_1755 = idxs[UInt<4>("h0e")] + node T_1756 = eq(T_1755, T_1711) + infer accessor T_1758 = idxs[UInt<4>("h0f")] + node T_1759 = eq(T_1758, T_1711) + infer accessor T_1761 = idxs[UInt<5>("h010")] + node T_1762 = eq(T_1761, T_1711) + infer accessor T_1764 = idxs[UInt<5>("h011")] + node T_1765 = eq(T_1764, T_1711) + infer accessor T_1767 = idxs[UInt<5>("h012")] + node T_1768 = eq(T_1767, T_1711) + infer accessor T_1770 = idxs[UInt<5>("h013")] + node T_1771 = eq(T_1770, T_1711) + infer accessor T_1773 = idxs[UInt<5>("h014")] + node T_1774 = eq(T_1773, T_1711) + infer accessor T_1776 = idxs[UInt<5>("h015")] + node T_1777 = eq(T_1776, T_1711) + infer accessor T_1779 = idxs[UInt<5>("h016")] + node T_1780 = eq(T_1779, T_1711) + infer accessor T_1782 = idxs[UInt<5>("h017")] + node T_1783 = eq(T_1782, T_1711) + infer accessor T_1785 = idxs[UInt<5>("h018")] + node T_1786 = eq(T_1785, T_1711) + infer accessor T_1788 = idxs[UInt<5>("h019")] + node T_1789 = eq(T_1788, T_1711) + infer accessor T_1791 = idxs[UInt<5>("h01a")] + node T_1792 = eq(T_1791, T_1711) + infer accessor T_1794 = idxs[UInt<5>("h01b")] + node T_1795 = eq(T_1794, T_1711) + infer accessor T_1797 = idxs[UInt<5>("h01c")] + node T_1798 = eq(T_1797, T_1711) + infer accessor T_1800 = idxs[UInt<5>("h01d")] + node T_1801 = eq(T_1800, T_1711) + infer accessor T_1803 = idxs[UInt<5>("h01e")] + node T_1804 = eq(T_1803, T_1711) + infer accessor T_1806 = idxs[UInt<5>("h01f")] + node T_1807 = eq(T_1806, T_1711) + infer accessor T_1809 = idxs[UInt<6>("h020")] + node T_1810 = eq(T_1809, T_1711) + infer accessor T_1812 = idxs[UInt<6>("h021")] + node T_1813 = eq(T_1812, T_1711) + infer accessor T_1815 = idxs[UInt<6>("h022")] + node T_1816 = eq(T_1815, T_1711) + infer accessor T_1818 = idxs[UInt<6>("h023")] + node T_1819 = eq(T_1818, T_1711) + infer accessor T_1821 = idxs[UInt<6>("h024")] + node T_1822 = eq(T_1821, T_1711) + infer accessor T_1824 = idxs[UInt<6>("h025")] + node T_1825 = eq(T_1824, T_1711) + infer accessor T_1827 = idxs[UInt<6>("h026")] + node T_1828 = eq(T_1827, T_1711) + infer accessor T_1830 = idxs[UInt<6>("h027")] + node T_1831 = eq(T_1830, T_1711) + infer accessor T_1833 = idxs[UInt<6>("h028")] + node T_1834 = eq(T_1833, T_1711) + infer accessor T_1836 = idxs[UInt<6>("h029")] + node T_1837 = eq(T_1836, T_1711) + infer accessor T_1839 = idxs[UInt<6>("h02a")] + node T_1840 = eq(T_1839, T_1711) + infer accessor T_1842 = idxs[UInt<6>("h02b")] + node T_1843 = eq(T_1842, T_1711) + infer accessor T_1845 = idxs[UInt<6>("h02c")] + node T_1846 = eq(T_1845, T_1711) + infer accessor T_1848 = idxs[UInt<6>("h02d")] + node T_1849 = eq(T_1848, T_1711) + infer accessor T_1851 = idxs[UInt<6>("h02e")] + node T_1852 = eq(T_1851, T_1711) + infer accessor T_1854 = idxs[UInt<6>("h02f")] + node T_1855 = eq(T_1854, T_1711) + infer accessor T_1857 = idxs[UInt<6>("h030")] + node T_1858 = eq(T_1857, T_1711) + infer accessor T_1860 = idxs[UInt<6>("h031")] + node T_1861 = eq(T_1860, T_1711) + infer accessor T_1863 = idxs[UInt<6>("h032")] + node T_1864 = eq(T_1863, T_1711) + infer accessor T_1866 = idxs[UInt<6>("h033")] + node T_1867 = eq(T_1866, T_1711) + infer accessor T_1869 = idxs[UInt<6>("h034")] + node T_1870 = eq(T_1869, T_1711) + infer accessor T_1872 = idxs[UInt<6>("h035")] + node T_1873 = eq(T_1872, T_1711) + infer accessor T_1875 = idxs[UInt<6>("h036")] + node T_1876 = eq(T_1875, T_1711) + infer accessor T_1878 = idxs[UInt<6>("h037")] + node T_1879 = eq(T_1878, T_1711) + infer accessor T_1881 = idxs[UInt<6>("h038")] + node T_1882 = eq(T_1881, T_1711) + infer accessor T_1884 = idxs[UInt<6>("h039")] + node T_1885 = eq(T_1884, T_1711) + infer accessor T_1887 = idxs[UInt<6>("h03a")] + node T_1888 = eq(T_1887, T_1711) + infer accessor T_1890 = idxs[UInt<6>("h03b")] + node T_1891 = eq(T_1890, T_1711) + infer accessor T_1893 = idxs[UInt<6>("h03c")] + node T_1894 = eq(T_1893, T_1711) + infer accessor T_1896 = idxs[UInt<6>("h03d")] + node T_1897 = eq(T_1896, T_1711) + wire T_1899 : UInt<1>[62] + T_1899[0] := T_1714 + T_1899[1] := T_1717 + T_1899[2] := T_1720 + T_1899[3] := T_1723 + T_1899[4] := T_1726 + T_1899[5] := T_1729 + T_1899[6] := T_1732 + T_1899[7] := T_1735 + T_1899[8] := T_1738 + T_1899[9] := T_1741 + T_1899[10] := T_1744 + T_1899[11] := T_1747 + T_1899[12] := T_1750 + T_1899[13] := T_1753 + T_1899[14] := T_1756 + T_1899[15] := T_1759 + T_1899[16] := T_1762 + T_1899[17] := T_1765 + T_1899[18] := T_1768 + T_1899[19] := T_1771 + T_1899[20] := T_1774 + T_1899[21] := T_1777 + T_1899[22] := T_1780 + T_1899[23] := T_1783 + T_1899[24] := T_1786 + T_1899[25] := T_1789 + T_1899[26] := T_1792 + T_1899[27] := T_1795 + T_1899[28] := T_1798 + T_1899[29] := T_1801 + T_1899[30] := T_1804 + T_1899[31] := T_1807 + T_1899[32] := T_1810 + T_1899[33] := T_1813 + T_1899[34] := T_1816 + T_1899[35] := T_1819 + T_1899[36] := T_1822 + T_1899[37] := T_1825 + T_1899[38] := T_1828 + T_1899[39] := T_1831 + T_1899[40] := T_1834 + T_1899[41] := T_1837 + T_1899[42] := T_1840 + T_1899[43] := T_1843 + T_1899[44] := T_1846 + T_1899[45] := T_1849 + T_1899[46] := T_1852 + T_1899[47] := T_1855 + T_1899[48] := T_1858 + T_1899[49] := T_1861 + T_1899[50] := T_1864 + T_1899[51] := T_1867 + T_1899[52] := T_1870 + T_1899[53] := T_1873 + T_1899[54] := T_1876 + T_1899[55] := T_1879 + T_1899[56] := T_1882 + T_1899[57] := T_1885 + T_1899[58] := T_1888 + T_1899[59] := T_1891 + T_1899[60] := T_1894 + T_1899[61] := T_1897 + node T_1963 = cat(T_1899[60], T_1899[59]) + node T_1964 = cat(T_1899[61], T_1963) + node T_1965 = cat(T_1899[58], T_1899[57]) + node T_1966 = cat(T_1899[56], T_1899[55]) + node T_1967 = cat(T_1965, T_1966) + node T_1968 = cat(T_1964, T_1967) + node T_1969 = cat(T_1899[54], T_1899[53]) + node T_1970 = cat(T_1899[52], T_1899[51]) + node T_1971 = cat(T_1969, T_1970) + node T_1972 = cat(T_1899[50], T_1899[49]) + node T_1973 = cat(T_1899[48], T_1899[47]) + node T_1974 = cat(T_1972, T_1973) + node T_1975 = cat(T_1971, T_1974) + node T_1976 = cat(T_1968, T_1975) + node T_1977 = cat(T_1899[46], T_1899[45]) + node T_1978 = cat(T_1899[44], T_1899[43]) + node T_1979 = cat(T_1977, T_1978) + node T_1980 = cat(T_1899[42], T_1899[41]) + node T_1981 = cat(T_1899[40], T_1899[39]) + node T_1982 = cat(T_1980, T_1981) + node T_1983 = cat(T_1979, T_1982) + node T_1984 = cat(T_1899[38], T_1899[37]) + node T_1985 = cat(T_1899[36], T_1899[35]) + node T_1986 = cat(T_1984, T_1985) + node T_1987 = cat(T_1899[34], T_1899[33]) + node T_1988 = cat(T_1899[32], T_1899[31]) + node T_1989 = cat(T_1987, T_1988) + node T_1990 = cat(T_1986, T_1989) + node T_1991 = cat(T_1983, T_1990) + node T_1992 = cat(T_1976, T_1991) + node T_1993 = cat(T_1899[29], T_1899[28]) + node T_1994 = cat(T_1899[30], T_1993) + node T_1995 = cat(T_1899[27], T_1899[26]) + node T_1996 = cat(T_1899[25], T_1899[24]) + node T_1997 = cat(T_1995, T_1996) + node T_1998 = cat(T_1994, T_1997) + node T_1999 = cat(T_1899[23], T_1899[22]) + node T_2000 = cat(T_1899[21], T_1899[20]) + node T_2001 = cat(T_1999, T_2000) + node T_2002 = cat(T_1899[19], T_1899[18]) + node T_2003 = cat(T_1899[17], T_1899[16]) + node T_2004 = cat(T_2002, T_2003) + node T_2005 = cat(T_2001, T_2004) + node T_2006 = cat(T_1998, T_2005) + node T_2007 = cat(T_1899[15], T_1899[14]) + node T_2008 = cat(T_1899[13], T_1899[12]) + node T_2009 = cat(T_2007, T_2008) + node T_2010 = cat(T_1899[11], T_1899[10]) + node T_2011 = cat(T_1899[9], T_1899[8]) + node T_2012 = cat(T_2010, T_2011) + node T_2013 = cat(T_2009, T_2012) + node T_2014 = cat(T_1899[7], T_1899[6]) + node T_2015 = cat(T_1899[5], T_1899[4]) + node T_2016 = cat(T_2014, T_2015) + node T_2017 = cat(T_1899[3], T_1899[2]) + node T_2018 = cat(T_1899[1], T_1899[0]) + node T_2019 = cat(T_2017, T_2018) + node T_2020 = cat(T_2016, T_2019) + node T_2021 = cat(T_2013, T_2020) + node T_2022 = cat(T_2006, T_2021) + node T_2023 = cat(T_1992, T_2022) + node T_2024 = and(T_592, pageHit) + node T_2025 = and(T_597, pageHit) + node T_2026 = and(T_602, pageHit) + node T_2027 = and(T_607, pageHit) + node T_2028 = and(T_612, pageHit) + node T_2029 = and(T_617, pageHit) + node T_2030 = and(T_622, pageHit) + node T_2031 = and(T_627, pageHit) + node T_2032 = and(T_632, pageHit) + node T_2033 = and(T_637, pageHit) + node T_2034 = and(T_642, pageHit) + node T_2035 = and(T_647, pageHit) + node T_2036 = and(T_652, pageHit) + node T_2037 = and(T_657, pageHit) + node T_2038 = and(T_662, pageHit) + node T_2039 = and(T_667, pageHit) + node T_2040 = and(T_672, pageHit) + node T_2041 = and(T_677, pageHit) + node T_2042 = and(T_682, pageHit) + node T_2043 = and(T_687, pageHit) + node T_2044 = and(T_692, pageHit) + node T_2045 = and(T_697, pageHit) + node T_2046 = and(T_702, pageHit) + node T_2047 = and(T_707, pageHit) + node T_2048 = and(T_712, pageHit) + node T_2049 = and(T_717, pageHit) + node T_2050 = and(T_722, pageHit) + node T_2051 = and(T_727, pageHit) + node T_2052 = and(T_732, pageHit) + node T_2053 = and(T_737, pageHit) + node T_2054 = and(T_742, pageHit) + node T_2055 = and(T_747, pageHit) + node T_2056 = and(T_752, pageHit) + node T_2057 = and(T_757, pageHit) + node T_2058 = and(T_762, pageHit) + node T_2059 = and(T_767, pageHit) + node T_2060 = and(T_772, pageHit) + node T_2061 = and(T_777, pageHit) + node T_2062 = and(T_782, pageHit) + node T_2063 = and(T_787, pageHit) + node T_2064 = and(T_792, pageHit) + node T_2065 = and(T_797, pageHit) + node T_2066 = and(T_802, pageHit) + node T_2067 = and(T_807, pageHit) + node T_2068 = and(T_812, pageHit) + node T_2069 = and(T_817, pageHit) + node T_2070 = and(T_822, pageHit) + node T_2071 = and(T_827, pageHit) + node T_2072 = and(T_832, pageHit) + node T_2073 = and(T_837, pageHit) + node T_2074 = and(T_842, pageHit) + node T_2075 = and(T_847, pageHit) + node T_2076 = and(T_852, pageHit) + node T_2077 = and(T_857, pageHit) + node T_2078 = and(T_862, pageHit) + node T_2079 = and(T_867, pageHit) + node T_2080 = and(T_872, pageHit) + node T_2081 = and(T_877, pageHit) + node T_2082 = and(T_882, pageHit) + node T_2083 = and(T_887, pageHit) + node T_2084 = and(T_892, pageHit) + node T_2085 = and(T_897, pageHit) + node T_2087 = neq(T_2024, UInt<1>("h00")) + node T_2089 = neq(T_2025, UInt<1>("h00")) + node T_2091 = neq(T_2026, UInt<1>("h00")) + node T_2093 = neq(T_2027, UInt<1>("h00")) + node T_2095 = neq(T_2028, UInt<1>("h00")) + node T_2097 = neq(T_2029, UInt<1>("h00")) + node T_2099 = neq(T_2030, UInt<1>("h00")) + node T_2101 = neq(T_2031, UInt<1>("h00")) + node T_2103 = neq(T_2032, UInt<1>("h00")) + node T_2105 = neq(T_2033, UInt<1>("h00")) + node T_2107 = neq(T_2034, UInt<1>("h00")) + node T_2109 = neq(T_2035, UInt<1>("h00")) + node T_2111 = neq(T_2036, UInt<1>("h00")) + node T_2113 = neq(T_2037, UInt<1>("h00")) + node T_2115 = neq(T_2038, UInt<1>("h00")) + node T_2117 = neq(T_2039, UInt<1>("h00")) + node T_2119 = neq(T_2040, UInt<1>("h00")) + node T_2121 = neq(T_2041, UInt<1>("h00")) + node T_2123 = neq(T_2042, UInt<1>("h00")) + node T_2125 = neq(T_2043, UInt<1>("h00")) + node T_2127 = neq(T_2044, UInt<1>("h00")) + node T_2129 = neq(T_2045, UInt<1>("h00")) + node T_2131 = neq(T_2046, UInt<1>("h00")) + node T_2133 = neq(T_2047, UInt<1>("h00")) + node T_2135 = neq(T_2048, UInt<1>("h00")) + node T_2137 = neq(T_2049, UInt<1>("h00")) + node T_2139 = neq(T_2050, UInt<1>("h00")) + node T_2141 = neq(T_2051, UInt<1>("h00")) + node T_2143 = neq(T_2052, UInt<1>("h00")) + node T_2145 = neq(T_2053, UInt<1>("h00")) + node T_2147 = neq(T_2054, UInt<1>("h00")) + node T_2149 = neq(T_2055, UInt<1>("h00")) + node T_2151 = neq(T_2056, UInt<1>("h00")) + node T_2153 = neq(T_2057, UInt<1>("h00")) + node T_2155 = neq(T_2058, UInt<1>("h00")) + node T_2157 = neq(T_2059, UInt<1>("h00")) + node T_2159 = neq(T_2060, UInt<1>("h00")) + node T_2161 = neq(T_2061, UInt<1>("h00")) + node T_2163 = neq(T_2062, UInt<1>("h00")) + node T_2165 = neq(T_2063, UInt<1>("h00")) + node T_2167 = neq(T_2064, UInt<1>("h00")) + node T_2169 = neq(T_2065, UInt<1>("h00")) + node T_2171 = neq(T_2066, UInt<1>("h00")) + node T_2173 = neq(T_2067, UInt<1>("h00")) + node T_2175 = neq(T_2068, UInt<1>("h00")) + node T_2177 = neq(T_2069, UInt<1>("h00")) + node T_2179 = neq(T_2070, UInt<1>("h00")) + node T_2181 = neq(T_2071, UInt<1>("h00")) + node T_2183 = neq(T_2072, UInt<1>("h00")) + node T_2185 = neq(T_2073, UInt<1>("h00")) + node T_2187 = neq(T_2074, UInt<1>("h00")) + node T_2189 = neq(T_2075, UInt<1>("h00")) + node T_2191 = neq(T_2076, UInt<1>("h00")) + node T_2193 = neq(T_2077, UInt<1>("h00")) + node T_2195 = neq(T_2078, UInt<1>("h00")) + node T_2197 = neq(T_2079, UInt<1>("h00")) + node T_2199 = neq(T_2080, UInt<1>("h00")) + node T_2201 = neq(T_2081, UInt<1>("h00")) + node T_2203 = neq(T_2082, UInt<1>("h00")) + node T_2205 = neq(T_2083, UInt<1>("h00")) + node T_2207 = neq(T_2084, UInt<1>("h00")) + node T_2209 = neq(T_2085, UInt<1>("h00")) + wire T_2211 : UInt<1>[62] + T_2211[0] := T_2087 + T_2211[1] := T_2089 + T_2211[2] := T_2091 + T_2211[3] := T_2093 + T_2211[4] := T_2095 + T_2211[5] := T_2097 + T_2211[6] := T_2099 + T_2211[7] := T_2101 + T_2211[8] := T_2103 + T_2211[9] := T_2105 + T_2211[10] := T_2107 + T_2211[11] := T_2109 + T_2211[12] := T_2111 + T_2211[13] := T_2113 + T_2211[14] := T_2115 + T_2211[15] := T_2117 + T_2211[16] := T_2119 + T_2211[17] := T_2121 + T_2211[18] := T_2123 + T_2211[19] := T_2125 + T_2211[20] := T_2127 + T_2211[21] := T_2129 + T_2211[22] := T_2131 + T_2211[23] := T_2133 + T_2211[24] := T_2135 + T_2211[25] := T_2137 + T_2211[26] := T_2139 + T_2211[27] := T_2141 + T_2211[28] := T_2143 + T_2211[29] := T_2145 + T_2211[30] := T_2147 + T_2211[31] := T_2149 + T_2211[32] := T_2151 + T_2211[33] := T_2153 + T_2211[34] := T_2155 + T_2211[35] := T_2157 + T_2211[36] := T_2159 + T_2211[37] := T_2161 + T_2211[38] := T_2163 + T_2211[39] := T_2165 + T_2211[40] := T_2167 + T_2211[41] := T_2169 + T_2211[42] := T_2171 + T_2211[43] := T_2173 + T_2211[44] := T_2175 + T_2211[45] := T_2177 + T_2211[46] := T_2179 + T_2211[47] := T_2181 + T_2211[48] := T_2183 + T_2211[49] := T_2185 + T_2211[50] := T_2187 + T_2211[51] := T_2189 + T_2211[52] := T_2191 + T_2211[53] := T_2193 + T_2211[54] := T_2195 + T_2211[55] := T_2197 + T_2211[56] := T_2199 + T_2211[57] := T_2201 + T_2211[58] := T_2203 + T_2211[59] := T_2205 + T_2211[60] := T_2207 + T_2211[61] := T_2209 + node T_2275 = cat(T_2211[60], T_2211[59]) + node T_2276 = cat(T_2211[61], T_2275) + node T_2277 = cat(T_2211[58], T_2211[57]) + node T_2278 = cat(T_2211[56], T_2211[55]) + node T_2279 = cat(T_2277, T_2278) + node T_2280 = cat(T_2276, T_2279) + node T_2281 = cat(T_2211[54], T_2211[53]) + node T_2282 = cat(T_2211[52], T_2211[51]) + node T_2283 = cat(T_2281, T_2282) + node T_2284 = cat(T_2211[50], T_2211[49]) + node T_2285 = cat(T_2211[48], T_2211[47]) + node T_2286 = cat(T_2284, T_2285) + node T_2287 = cat(T_2283, T_2286) + node T_2288 = cat(T_2280, T_2287) + node T_2289 = cat(T_2211[46], T_2211[45]) + node T_2290 = cat(T_2211[44], T_2211[43]) + node T_2291 = cat(T_2289, T_2290) + node T_2292 = cat(T_2211[42], T_2211[41]) + node T_2293 = cat(T_2211[40], T_2211[39]) + node T_2294 = cat(T_2292, T_2293) + node T_2295 = cat(T_2291, T_2294) + node T_2296 = cat(T_2211[38], T_2211[37]) + node T_2297 = cat(T_2211[36], T_2211[35]) + node T_2298 = cat(T_2296, T_2297) + node T_2299 = cat(T_2211[34], T_2211[33]) + node T_2300 = cat(T_2211[32], T_2211[31]) + node T_2301 = cat(T_2299, T_2300) + node T_2302 = cat(T_2298, T_2301) + node T_2303 = cat(T_2295, T_2302) + node T_2304 = cat(T_2288, T_2303) + node T_2305 = cat(T_2211[29], T_2211[28]) + node T_2306 = cat(T_2211[30], T_2305) + node T_2307 = cat(T_2211[27], T_2211[26]) + node T_2308 = cat(T_2211[25], T_2211[24]) + node T_2309 = cat(T_2307, T_2308) + node T_2310 = cat(T_2306, T_2309) + node T_2311 = cat(T_2211[23], T_2211[22]) + node T_2312 = cat(T_2211[21], T_2211[20]) + node T_2313 = cat(T_2311, T_2312) + node T_2314 = cat(T_2211[19], T_2211[18]) + node T_2315 = cat(T_2211[17], T_2211[16]) + node T_2316 = cat(T_2314, T_2315) + node T_2317 = cat(T_2313, T_2316) + node T_2318 = cat(T_2310, T_2317) + node T_2319 = cat(T_2211[15], T_2211[14]) + node T_2320 = cat(T_2211[13], T_2211[12]) + node T_2321 = cat(T_2319, T_2320) + node T_2322 = cat(T_2211[11], T_2211[10]) + node T_2323 = cat(T_2211[9], T_2211[8]) + node T_2324 = cat(T_2322, T_2323) + node T_2325 = cat(T_2321, T_2324) + node T_2326 = cat(T_2211[7], T_2211[6]) + node T_2327 = cat(T_2211[5], T_2211[4]) + node T_2328 = cat(T_2326, T_2327) + node T_2329 = cat(T_2211[3], T_2211[2]) + node T_2330 = cat(T_2211[1], T_2211[0]) + node T_2331 = cat(T_2329, T_2330) + node T_2332 = cat(T_2328, T_2331) + node T_2333 = cat(T_2325, T_2332) + node T_2334 = cat(T_2318, T_2333) + node T_2335 = cat(T_2304, T_2334) + node T_2336 = and(idxValid, T_2023) + node hits = and(T_2336, T_2335) + node T_2338 = shr(r_btb_update.bits.pc, 12) + infer accessor T_2340 = pages[UInt<1>("h00")] + node T_2341 = eq(T_2340, T_2338) + infer accessor T_2343 = pages[UInt<1>("h01")] + node T_2344 = eq(T_2343, T_2338) + infer accessor T_2346 = pages[UInt<2>("h02")] + node T_2347 = eq(T_2346, T_2338) + infer accessor T_2349 = pages[UInt<2>("h03")] + node T_2350 = eq(T_2349, T_2338) + infer accessor T_2352 = pages[UInt<3>("h04")] + node T_2353 = eq(T_2352, T_2338) + infer accessor T_2355 = pages[UInt<3>("h05")] + node T_2356 = eq(T_2355, T_2338) + wire T_2358 : UInt<1>[6] + T_2358[0] := T_2341 + T_2358[1] := T_2344 + T_2358[2] := T_2347 + T_2358[3] := T_2350 + T_2358[4] := T_2353 + T_2358[5] := T_2356 + node T_2366 = cat(T_2358[4], T_2358[3]) + node T_2367 = cat(T_2358[5], T_2366) + node T_2368 = cat(T_2358[1], T_2358[0]) + node T_2369 = cat(T_2358[2], T_2368) + node T_2370 = cat(T_2367, T_2369) + node updatePageHit = and(T_2370, pageValid) + node T_2372 = bits(r_btb_update.bits.pc, 11, 0) + infer accessor T_2374 = idxs[UInt<1>("h00")] + node T_2375 = eq(T_2374, T_2372) + infer accessor T_2377 = idxs[UInt<1>("h01")] + node T_2378 = eq(T_2377, T_2372) + infer accessor T_2380 = idxs[UInt<2>("h02")] + node T_2381 = eq(T_2380, T_2372) + infer accessor T_2383 = idxs[UInt<2>("h03")] + node T_2384 = eq(T_2383, T_2372) + infer accessor T_2386 = idxs[UInt<3>("h04")] + node T_2387 = eq(T_2386, T_2372) + infer accessor T_2389 = idxs[UInt<3>("h05")] + node T_2390 = eq(T_2389, T_2372) + infer accessor T_2392 = idxs[UInt<3>("h06")] + node T_2393 = eq(T_2392, T_2372) + infer accessor T_2395 = idxs[UInt<3>("h07")] + node T_2396 = eq(T_2395, T_2372) + infer accessor T_2398 = idxs[UInt<4>("h08")] + node T_2399 = eq(T_2398, T_2372) + infer accessor T_2401 = idxs[UInt<4>("h09")] + node T_2402 = eq(T_2401, T_2372) + infer accessor T_2404 = idxs[UInt<4>("h0a")] + node T_2405 = eq(T_2404, T_2372) + infer accessor T_2407 = idxs[UInt<4>("h0b")] + node T_2408 = eq(T_2407, T_2372) + infer accessor T_2410 = idxs[UInt<4>("h0c")] + node T_2411 = eq(T_2410, T_2372) + infer accessor T_2413 = idxs[UInt<4>("h0d")] + node T_2414 = eq(T_2413, T_2372) + infer accessor T_2416 = idxs[UInt<4>("h0e")] + node T_2417 = eq(T_2416, T_2372) + infer accessor T_2419 = idxs[UInt<4>("h0f")] + node T_2420 = eq(T_2419, T_2372) + infer accessor T_2422 = idxs[UInt<5>("h010")] + node T_2423 = eq(T_2422, T_2372) + infer accessor T_2425 = idxs[UInt<5>("h011")] + node T_2426 = eq(T_2425, T_2372) + infer accessor T_2428 = idxs[UInt<5>("h012")] + node T_2429 = eq(T_2428, T_2372) + infer accessor T_2431 = idxs[UInt<5>("h013")] + node T_2432 = eq(T_2431, T_2372) + infer accessor T_2434 = idxs[UInt<5>("h014")] + node T_2435 = eq(T_2434, T_2372) + infer accessor T_2437 = idxs[UInt<5>("h015")] + node T_2438 = eq(T_2437, T_2372) + infer accessor T_2440 = idxs[UInt<5>("h016")] + node T_2441 = eq(T_2440, T_2372) + infer accessor T_2443 = idxs[UInt<5>("h017")] + node T_2444 = eq(T_2443, T_2372) + infer accessor T_2446 = idxs[UInt<5>("h018")] + node T_2447 = eq(T_2446, T_2372) + infer accessor T_2449 = idxs[UInt<5>("h019")] + node T_2450 = eq(T_2449, T_2372) + infer accessor T_2452 = idxs[UInt<5>("h01a")] + node T_2453 = eq(T_2452, T_2372) + infer accessor T_2455 = idxs[UInt<5>("h01b")] + node T_2456 = eq(T_2455, T_2372) + infer accessor T_2458 = idxs[UInt<5>("h01c")] + node T_2459 = eq(T_2458, T_2372) + infer accessor T_2461 = idxs[UInt<5>("h01d")] + node T_2462 = eq(T_2461, T_2372) + infer accessor T_2464 = idxs[UInt<5>("h01e")] + node T_2465 = eq(T_2464, T_2372) + infer accessor T_2467 = idxs[UInt<5>("h01f")] + node T_2468 = eq(T_2467, T_2372) + infer accessor T_2470 = idxs[UInt<6>("h020")] + node T_2471 = eq(T_2470, T_2372) + infer accessor T_2473 = idxs[UInt<6>("h021")] + node T_2474 = eq(T_2473, T_2372) + infer accessor T_2476 = idxs[UInt<6>("h022")] + node T_2477 = eq(T_2476, T_2372) + infer accessor T_2479 = idxs[UInt<6>("h023")] + node T_2480 = eq(T_2479, T_2372) + infer accessor T_2482 = idxs[UInt<6>("h024")] + node T_2483 = eq(T_2482, T_2372) + infer accessor T_2485 = idxs[UInt<6>("h025")] + node T_2486 = eq(T_2485, T_2372) + infer accessor T_2488 = idxs[UInt<6>("h026")] + node T_2489 = eq(T_2488, T_2372) + infer accessor T_2491 = idxs[UInt<6>("h027")] + node T_2492 = eq(T_2491, T_2372) + infer accessor T_2494 = idxs[UInt<6>("h028")] + node T_2495 = eq(T_2494, T_2372) + infer accessor T_2497 = idxs[UInt<6>("h029")] + node T_2498 = eq(T_2497, T_2372) + infer accessor T_2500 = idxs[UInt<6>("h02a")] + node T_2501 = eq(T_2500, T_2372) + infer accessor T_2503 = idxs[UInt<6>("h02b")] + node T_2504 = eq(T_2503, T_2372) + infer accessor T_2506 = idxs[UInt<6>("h02c")] + node T_2507 = eq(T_2506, T_2372) + infer accessor T_2509 = idxs[UInt<6>("h02d")] + node T_2510 = eq(T_2509, T_2372) + infer accessor T_2512 = idxs[UInt<6>("h02e")] + node T_2513 = eq(T_2512, T_2372) + infer accessor T_2515 = idxs[UInt<6>("h02f")] + node T_2516 = eq(T_2515, T_2372) + infer accessor T_2518 = idxs[UInt<6>("h030")] + node T_2519 = eq(T_2518, T_2372) + infer accessor T_2521 = idxs[UInt<6>("h031")] + node T_2522 = eq(T_2521, T_2372) + infer accessor T_2524 = idxs[UInt<6>("h032")] + node T_2525 = eq(T_2524, T_2372) + infer accessor T_2527 = idxs[UInt<6>("h033")] + node T_2528 = eq(T_2527, T_2372) + infer accessor T_2530 = idxs[UInt<6>("h034")] + node T_2531 = eq(T_2530, T_2372) + infer accessor T_2533 = idxs[UInt<6>("h035")] + node T_2534 = eq(T_2533, T_2372) + infer accessor T_2536 = idxs[UInt<6>("h036")] + node T_2537 = eq(T_2536, T_2372) + infer accessor T_2539 = idxs[UInt<6>("h037")] + node T_2540 = eq(T_2539, T_2372) + infer accessor T_2542 = idxs[UInt<6>("h038")] + node T_2543 = eq(T_2542, T_2372) + infer accessor T_2545 = idxs[UInt<6>("h039")] + node T_2546 = eq(T_2545, T_2372) + infer accessor T_2548 = idxs[UInt<6>("h03a")] + node T_2549 = eq(T_2548, T_2372) + infer accessor T_2551 = idxs[UInt<6>("h03b")] + node T_2552 = eq(T_2551, T_2372) + infer accessor T_2554 = idxs[UInt<6>("h03c")] + node T_2555 = eq(T_2554, T_2372) + infer accessor T_2557 = idxs[UInt<6>("h03d")] + node T_2558 = eq(T_2557, T_2372) + wire T_2560 : UInt<1>[62] + T_2560[0] := T_2375 + T_2560[1] := T_2378 + T_2560[2] := T_2381 + T_2560[3] := T_2384 + T_2560[4] := T_2387 + T_2560[5] := T_2390 + T_2560[6] := T_2393 + T_2560[7] := T_2396 + T_2560[8] := T_2399 + T_2560[9] := T_2402 + T_2560[10] := T_2405 + T_2560[11] := T_2408 + T_2560[12] := T_2411 + T_2560[13] := T_2414 + T_2560[14] := T_2417 + T_2560[15] := T_2420 + T_2560[16] := T_2423 + T_2560[17] := T_2426 + T_2560[18] := T_2429 + T_2560[19] := T_2432 + T_2560[20] := T_2435 + T_2560[21] := T_2438 + T_2560[22] := T_2441 + T_2560[23] := T_2444 + T_2560[24] := T_2447 + T_2560[25] := T_2450 + T_2560[26] := T_2453 + T_2560[27] := T_2456 + T_2560[28] := T_2459 + T_2560[29] := T_2462 + T_2560[30] := T_2465 + T_2560[31] := T_2468 + T_2560[32] := T_2471 + T_2560[33] := T_2474 + T_2560[34] := T_2477 + T_2560[35] := T_2480 + T_2560[36] := T_2483 + T_2560[37] := T_2486 + T_2560[38] := T_2489 + T_2560[39] := T_2492 + T_2560[40] := T_2495 + T_2560[41] := T_2498 + T_2560[42] := T_2501 + T_2560[43] := T_2504 + T_2560[44] := T_2507 + T_2560[45] := T_2510 + T_2560[46] := T_2513 + T_2560[47] := T_2516 + T_2560[48] := T_2519 + T_2560[49] := T_2522 + T_2560[50] := T_2525 + T_2560[51] := T_2528 + T_2560[52] := T_2531 + T_2560[53] := T_2534 + T_2560[54] := T_2537 + T_2560[55] := T_2540 + T_2560[56] := T_2543 + T_2560[57] := T_2546 + T_2560[58] := T_2549 + T_2560[59] := T_2552 + T_2560[60] := T_2555 + T_2560[61] := T_2558 + node T_2624 = cat(T_2560[60], T_2560[59]) + node T_2625 = cat(T_2560[61], T_2624) + node T_2626 = cat(T_2560[58], T_2560[57]) + node T_2627 = cat(T_2560[56], T_2560[55]) + node T_2628 = cat(T_2626, T_2627) + node T_2629 = cat(T_2625, T_2628) + node T_2630 = cat(T_2560[54], T_2560[53]) + node T_2631 = cat(T_2560[52], T_2560[51]) + node T_2632 = cat(T_2630, T_2631) + node T_2633 = cat(T_2560[50], T_2560[49]) + node T_2634 = cat(T_2560[48], T_2560[47]) + node T_2635 = cat(T_2633, T_2634) + node T_2636 = cat(T_2632, T_2635) + node T_2637 = cat(T_2629, T_2636) + node T_2638 = cat(T_2560[46], T_2560[45]) + node T_2639 = cat(T_2560[44], T_2560[43]) + node T_2640 = cat(T_2638, T_2639) + node T_2641 = cat(T_2560[42], T_2560[41]) + node T_2642 = cat(T_2560[40], T_2560[39]) + node T_2643 = cat(T_2641, T_2642) + node T_2644 = cat(T_2640, T_2643) + node T_2645 = cat(T_2560[38], T_2560[37]) + node T_2646 = cat(T_2560[36], T_2560[35]) + node T_2647 = cat(T_2645, T_2646) + node T_2648 = cat(T_2560[34], T_2560[33]) + node T_2649 = cat(T_2560[32], T_2560[31]) + node T_2650 = cat(T_2648, T_2649) + node T_2651 = cat(T_2647, T_2650) + node T_2652 = cat(T_2644, T_2651) + node T_2653 = cat(T_2637, T_2652) + node T_2654 = cat(T_2560[29], T_2560[28]) + node T_2655 = cat(T_2560[30], T_2654) + node T_2656 = cat(T_2560[27], T_2560[26]) + node T_2657 = cat(T_2560[25], T_2560[24]) + node T_2658 = cat(T_2656, T_2657) + node T_2659 = cat(T_2655, T_2658) + node T_2660 = cat(T_2560[23], T_2560[22]) + node T_2661 = cat(T_2560[21], T_2560[20]) + node T_2662 = cat(T_2660, T_2661) + node T_2663 = cat(T_2560[19], T_2560[18]) + node T_2664 = cat(T_2560[17], T_2560[16]) + node T_2665 = cat(T_2663, T_2664) + node T_2666 = cat(T_2662, T_2665) + node T_2667 = cat(T_2659, T_2666) + node T_2668 = cat(T_2560[15], T_2560[14]) + node T_2669 = cat(T_2560[13], T_2560[12]) + node T_2670 = cat(T_2668, T_2669) + node T_2671 = cat(T_2560[11], T_2560[10]) + node T_2672 = cat(T_2560[9], T_2560[8]) + node T_2673 = cat(T_2671, T_2672) + node T_2674 = cat(T_2670, T_2673) + node T_2675 = cat(T_2560[7], T_2560[6]) + node T_2676 = cat(T_2560[5], T_2560[4]) + node T_2677 = cat(T_2675, T_2676) + node T_2678 = cat(T_2560[3], T_2560[2]) + node T_2679 = cat(T_2560[1], T_2560[0]) + node T_2680 = cat(T_2678, T_2679) + node T_2681 = cat(T_2677, T_2680) + node T_2682 = cat(T_2674, T_2681) + node T_2683 = cat(T_2667, T_2682) + node T_2684 = cat(T_2653, T_2683) + node T_2685 = and(T_592, updatePageHit) + node T_2686 = and(T_597, updatePageHit) + node T_2687 = and(T_602, updatePageHit) + node T_2688 = and(T_607, updatePageHit) + node T_2689 = and(T_612, updatePageHit) + node T_2690 = and(T_617, updatePageHit) + node T_2691 = and(T_622, updatePageHit) + node T_2692 = and(T_627, updatePageHit) + node T_2693 = and(T_632, updatePageHit) + node T_2694 = and(T_637, updatePageHit) + node T_2695 = and(T_642, updatePageHit) + node T_2696 = and(T_647, updatePageHit) + node T_2697 = and(T_652, updatePageHit) + node T_2698 = and(T_657, updatePageHit) + node T_2699 = and(T_662, updatePageHit) + node T_2700 = and(T_667, updatePageHit) + node T_2701 = and(T_672, updatePageHit) + node T_2702 = and(T_677, updatePageHit) + node T_2703 = and(T_682, updatePageHit) + node T_2704 = and(T_687, updatePageHit) + node T_2705 = and(T_692, updatePageHit) + node T_2706 = and(T_697, updatePageHit) + node T_2707 = and(T_702, updatePageHit) + node T_2708 = and(T_707, updatePageHit) + node T_2709 = and(T_712, updatePageHit) + node T_2710 = and(T_717, updatePageHit) + node T_2711 = and(T_722, updatePageHit) + node T_2712 = and(T_727, updatePageHit) + node T_2713 = and(T_732, updatePageHit) + node T_2714 = and(T_737, updatePageHit) + node T_2715 = and(T_742, updatePageHit) + node T_2716 = and(T_747, updatePageHit) + node T_2717 = and(T_752, updatePageHit) + node T_2718 = and(T_757, updatePageHit) + node T_2719 = and(T_762, updatePageHit) + node T_2720 = and(T_767, updatePageHit) + node T_2721 = and(T_772, updatePageHit) + node T_2722 = and(T_777, updatePageHit) + node T_2723 = and(T_782, updatePageHit) + node T_2724 = and(T_787, updatePageHit) + node T_2725 = and(T_792, updatePageHit) + node T_2726 = and(T_797, updatePageHit) + node T_2727 = and(T_802, updatePageHit) + node T_2728 = and(T_807, updatePageHit) + node T_2729 = and(T_812, updatePageHit) + node T_2730 = and(T_817, updatePageHit) + node T_2731 = and(T_822, updatePageHit) + node T_2732 = and(T_827, updatePageHit) + node T_2733 = and(T_832, updatePageHit) + node T_2734 = and(T_837, updatePageHit) + node T_2735 = and(T_842, updatePageHit) + node T_2736 = and(T_847, updatePageHit) + node T_2737 = and(T_852, updatePageHit) + node T_2738 = and(T_857, updatePageHit) + node T_2739 = and(T_862, updatePageHit) + node T_2740 = and(T_867, updatePageHit) + node T_2741 = and(T_872, updatePageHit) + node T_2742 = and(T_877, updatePageHit) + node T_2743 = and(T_882, updatePageHit) + node T_2744 = and(T_887, updatePageHit) + node T_2745 = and(T_892, updatePageHit) + node T_2746 = and(T_897, updatePageHit) + node T_2748 = neq(T_2685, UInt<1>("h00")) + node T_2750 = neq(T_2686, UInt<1>("h00")) + node T_2752 = neq(T_2687, UInt<1>("h00")) + node T_2754 = neq(T_2688, UInt<1>("h00")) + node T_2756 = neq(T_2689, UInt<1>("h00")) + node T_2758 = neq(T_2690, UInt<1>("h00")) + node T_2760 = neq(T_2691, UInt<1>("h00")) + node T_2762 = neq(T_2692, UInt<1>("h00")) + node T_2764 = neq(T_2693, UInt<1>("h00")) + node T_2766 = neq(T_2694, UInt<1>("h00")) + node T_2768 = neq(T_2695, UInt<1>("h00")) + node T_2770 = neq(T_2696, UInt<1>("h00")) + node T_2772 = neq(T_2697, UInt<1>("h00")) + node T_2774 = neq(T_2698, UInt<1>("h00")) + node T_2776 = neq(T_2699, UInt<1>("h00")) + node T_2778 = neq(T_2700, UInt<1>("h00")) + node T_2780 = neq(T_2701, UInt<1>("h00")) + node T_2782 = neq(T_2702, UInt<1>("h00")) + node T_2784 = neq(T_2703, UInt<1>("h00")) + node T_2786 = neq(T_2704, UInt<1>("h00")) + node T_2788 = neq(T_2705, UInt<1>("h00")) + node T_2790 = neq(T_2706, UInt<1>("h00")) + node T_2792 = neq(T_2707, UInt<1>("h00")) + node T_2794 = neq(T_2708, UInt<1>("h00")) + node T_2796 = neq(T_2709, UInt<1>("h00")) + node T_2798 = neq(T_2710, UInt<1>("h00")) + node T_2800 = neq(T_2711, UInt<1>("h00")) + node T_2802 = neq(T_2712, UInt<1>("h00")) + node T_2804 = neq(T_2713, UInt<1>("h00")) + node T_2806 = neq(T_2714, UInt<1>("h00")) + node T_2808 = neq(T_2715, UInt<1>("h00")) + node T_2810 = neq(T_2716, UInt<1>("h00")) + node T_2812 = neq(T_2717, UInt<1>("h00")) + node T_2814 = neq(T_2718, UInt<1>("h00")) + node T_2816 = neq(T_2719, UInt<1>("h00")) + node T_2818 = neq(T_2720, UInt<1>("h00")) + node T_2820 = neq(T_2721, UInt<1>("h00")) + node T_2822 = neq(T_2722, UInt<1>("h00")) + node T_2824 = neq(T_2723, UInt<1>("h00")) + node T_2826 = neq(T_2724, UInt<1>("h00")) + node T_2828 = neq(T_2725, UInt<1>("h00")) + node T_2830 = neq(T_2726, UInt<1>("h00")) + node T_2832 = neq(T_2727, UInt<1>("h00")) + node T_2834 = neq(T_2728, UInt<1>("h00")) + node T_2836 = neq(T_2729, UInt<1>("h00")) + node T_2838 = neq(T_2730, UInt<1>("h00")) + node T_2840 = neq(T_2731, UInt<1>("h00")) + node T_2842 = neq(T_2732, UInt<1>("h00")) + node T_2844 = neq(T_2733, UInt<1>("h00")) + node T_2846 = neq(T_2734, UInt<1>("h00")) + node T_2848 = neq(T_2735, UInt<1>("h00")) + node T_2850 = neq(T_2736, UInt<1>("h00")) + node T_2852 = neq(T_2737, UInt<1>("h00")) + node T_2854 = neq(T_2738, UInt<1>("h00")) + node T_2856 = neq(T_2739, UInt<1>("h00")) + node T_2858 = neq(T_2740, UInt<1>("h00")) + node T_2860 = neq(T_2741, UInt<1>("h00")) + node T_2862 = neq(T_2742, UInt<1>("h00")) + node T_2864 = neq(T_2743, UInt<1>("h00")) + node T_2866 = neq(T_2744, UInt<1>("h00")) + node T_2868 = neq(T_2745, UInt<1>("h00")) + node T_2870 = neq(T_2746, UInt<1>("h00")) + wire T_2872 : UInt<1>[62] + T_2872[0] := T_2748 + T_2872[1] := T_2750 + T_2872[2] := T_2752 + T_2872[3] := T_2754 + T_2872[4] := T_2756 + T_2872[5] := T_2758 + T_2872[6] := T_2760 + T_2872[7] := T_2762 + T_2872[8] := T_2764 + T_2872[9] := T_2766 + T_2872[10] := T_2768 + T_2872[11] := T_2770 + T_2872[12] := T_2772 + T_2872[13] := T_2774 + T_2872[14] := T_2776 + T_2872[15] := T_2778 + T_2872[16] := T_2780 + T_2872[17] := T_2782 + T_2872[18] := T_2784 + T_2872[19] := T_2786 + T_2872[20] := T_2788 + T_2872[21] := T_2790 + T_2872[22] := T_2792 + T_2872[23] := T_2794 + T_2872[24] := T_2796 + T_2872[25] := T_2798 + T_2872[26] := T_2800 + T_2872[27] := T_2802 + T_2872[28] := T_2804 + T_2872[29] := T_2806 + T_2872[30] := T_2808 + T_2872[31] := T_2810 + T_2872[32] := T_2812 + T_2872[33] := T_2814 + T_2872[34] := T_2816 + T_2872[35] := T_2818 + T_2872[36] := T_2820 + T_2872[37] := T_2822 + T_2872[38] := T_2824 + T_2872[39] := T_2826 + T_2872[40] := T_2828 + T_2872[41] := T_2830 + T_2872[42] := T_2832 + T_2872[43] := T_2834 + T_2872[44] := T_2836 + T_2872[45] := T_2838 + T_2872[46] := T_2840 + T_2872[47] := T_2842 + T_2872[48] := T_2844 + T_2872[49] := T_2846 + T_2872[50] := T_2848 + T_2872[51] := T_2850 + T_2872[52] := T_2852 + T_2872[53] := T_2854 + T_2872[54] := T_2856 + T_2872[55] := T_2858 + T_2872[56] := T_2860 + T_2872[57] := T_2862 + T_2872[58] := T_2864 + T_2872[59] := T_2866 + T_2872[60] := T_2868 + T_2872[61] := T_2870 + node T_2936 = cat(T_2872[60], T_2872[59]) + node T_2937 = cat(T_2872[61], T_2936) + node T_2938 = cat(T_2872[58], T_2872[57]) + node T_2939 = cat(T_2872[56], T_2872[55]) + node T_2940 = cat(T_2938, T_2939) + node T_2941 = cat(T_2937, T_2940) + node T_2942 = cat(T_2872[54], T_2872[53]) + node T_2943 = cat(T_2872[52], T_2872[51]) + node T_2944 = cat(T_2942, T_2943) + node T_2945 = cat(T_2872[50], T_2872[49]) + node T_2946 = cat(T_2872[48], T_2872[47]) + node T_2947 = cat(T_2945, T_2946) + node T_2948 = cat(T_2944, T_2947) + node T_2949 = cat(T_2941, T_2948) + node T_2950 = cat(T_2872[46], T_2872[45]) + node T_2951 = cat(T_2872[44], T_2872[43]) + node T_2952 = cat(T_2950, T_2951) + node T_2953 = cat(T_2872[42], T_2872[41]) + node T_2954 = cat(T_2872[40], T_2872[39]) + node T_2955 = cat(T_2953, T_2954) + node T_2956 = cat(T_2952, T_2955) + node T_2957 = cat(T_2872[38], T_2872[37]) + node T_2958 = cat(T_2872[36], T_2872[35]) + node T_2959 = cat(T_2957, T_2958) + node T_2960 = cat(T_2872[34], T_2872[33]) + node T_2961 = cat(T_2872[32], T_2872[31]) + node T_2962 = cat(T_2960, T_2961) + node T_2963 = cat(T_2959, T_2962) + node T_2964 = cat(T_2956, T_2963) + node T_2965 = cat(T_2949, T_2964) + node T_2966 = cat(T_2872[29], T_2872[28]) + node T_2967 = cat(T_2872[30], T_2966) + node T_2968 = cat(T_2872[27], T_2872[26]) + node T_2969 = cat(T_2872[25], T_2872[24]) + node T_2970 = cat(T_2968, T_2969) + node T_2971 = cat(T_2967, T_2970) + node T_2972 = cat(T_2872[23], T_2872[22]) + node T_2973 = cat(T_2872[21], T_2872[20]) + node T_2974 = cat(T_2972, T_2973) + node T_2975 = cat(T_2872[19], T_2872[18]) + node T_2976 = cat(T_2872[17], T_2872[16]) + node T_2977 = cat(T_2975, T_2976) + node T_2978 = cat(T_2974, T_2977) + node T_2979 = cat(T_2971, T_2978) + node T_2980 = cat(T_2872[15], T_2872[14]) + node T_2981 = cat(T_2872[13], T_2872[12]) + node T_2982 = cat(T_2980, T_2981) + node T_2983 = cat(T_2872[11], T_2872[10]) + node T_2984 = cat(T_2872[9], T_2872[8]) + node T_2985 = cat(T_2983, T_2984) + node T_2986 = cat(T_2982, T_2985) + node T_2987 = cat(T_2872[7], T_2872[6]) + node T_2988 = cat(T_2872[5], T_2872[4]) + node T_2989 = cat(T_2987, T_2988) + node T_2990 = cat(T_2872[3], T_2872[2]) + node T_2991 = cat(T_2872[1], T_2872[0]) + node T_2992 = cat(T_2990, T_2991) + node T_2993 = cat(T_2989, T_2992) + node T_2994 = cat(T_2986, T_2993) + node T_2995 = cat(T_2979, T_2994) + node T_2996 = cat(T_2965, T_2995) + node T_2997 = and(idxValid, T_2684) + node updateHits = and(T_2997, T_2996) + reg T_3000 : UInt<16>, clock, reset + onreset T_3000 := UInt<16>("h01") + when r_btb_update.valid : + node T_3001 = bit(T_3000, 0) + node T_3002 = bit(T_3000, 2) + node T_3003 = xor(T_3001, T_3002) + node T_3004 = bit(T_3000, 3) + node T_3005 = xor(T_3003, T_3004) + node T_3006 = bit(T_3000, 5) + node T_3007 = xor(T_3005, T_3006) + node T_3008 = bits(T_3000, 15, 1) + node T_3009 = cat(T_3007, T_3008) + T_3000 := T_3009 + skip + node useUpdatePageHit = neq(updatePageHit, UInt<1>("h00")) + node doIdxPageRepl = eq(useUpdatePageHit, UInt<1>("h00")) + wire idxPageRepl : UInt<6> + idxPageRepl := UInt<1>("h00") + node idxPageUpdateOH = mux(useUpdatePageHit, updatePageHit, idxPageRepl) + node T_3018 = bits(idxPageUpdateOH, 5, 4) + node T_3019 = bits(idxPageUpdateOH, 3, 0) + node T_3021 = neq(T_3018, UInt<1>("h00")) + node T_3022 = or(T_3018, T_3019) + node T_3023 = bits(T_3022, 3, 2) + node T_3024 = bits(T_3022, 1, 0) + node T_3026 = neq(T_3023, UInt<1>("h00")) + node T_3027 = or(T_3023, T_3024) + node T_3028 = bit(T_3027, 1) + node T_3029 = cat(T_3026, T_3028) + node idxPageUpdate = cat(T_3021, T_3029) + node idxPageReplEn = mux(doIdxPageRepl, idxPageRepl, UInt<1>("h00")) + node T_3033 = shr(r_btb_update.bits.pc, 12) + node T_3034 = shr(req.bits.addr, 12) + node samePage = eq(T_3033, T_3034) + node T_3036 = not(idxPageReplEn) + node T_3037 = and(pageHit, T_3036) + node usePageHit = neq(T_3037, UInt<1>("h00")) + node T_3041 = eq(samePage, UInt<1>("h00")) + node T_3043 = eq(usePageHit, UInt<1>("h00")) + node doTgtPageRepl = and(T_3041, T_3043) + node T_3045 = bits(idxPageUpdateOH, 4, 0) + node T_3046 = shl(T_3045, 1) + node T_3047 = bit(idxPageUpdateOH, 5) + node T_3048 = or(T_3046, T_3047) + node tgtPageRepl = mux(samePage, idxPageUpdateOH, T_3048) + node T_3050 = mux(usePageHit, pageHit, tgtPageRepl) + node T_3051 = bits(T_3050, 5, 4) + node T_3052 = bits(T_3050, 3, 0) + node T_3054 = neq(T_3051, UInt<1>("h00")) + node T_3055 = or(T_3051, T_3052) + node T_3056 = bits(T_3055, 3, 2) + node T_3057 = bits(T_3055, 1, 0) + node T_3059 = neq(T_3056, UInt<1>("h00")) + node T_3060 = or(T_3056, T_3057) + node T_3061 = bit(T_3060, 1) + node T_3062 = cat(T_3059, T_3061) + node tgtPageUpdate = cat(T_3054, T_3062) + node tgtPageReplEn = mux(doTgtPageRepl, tgtPageRepl, UInt<1>("h00")) + node doPageRepl = or(doIdxPageRepl, doTgtPageRepl) + node pageReplEn = or(idxPageReplEn, tgtPageReplEn) + node T_3068 = and(r_btb_update.valid, doPageRepl) + reg T_3070 : UInt<3>, clock, reset + onreset T_3070 := UInt<3>("h00") + when T_3068 : + node T_3072 = eq(T_3070, UInt<3>("h05")) + node T_3074 = and(UInt<1>("h01"), T_3072) + node T_3077 = addw(T_3070, UInt<1>("h01")) + node T_3078 = mux(T_3074, UInt<1>("h00"), T_3077) + T_3070 := T_3078 + skip + node T_3079 = and(T_3068, T_3072) + node T_3081 = dshl(UInt<1>("h01"), T_3070) + idxPageRepl := T_3081 + when r_btb_update.valid : + node T_3082 = eq(req.bits.addr, r_btb_update.bits.target) + node T_3084 = eq(r_btb_update.bits.prediction.valid, UInt<1>("h00")) + reg T_3086 : UInt<6>, clock, reset + onreset T_3086 := UInt<6>("h00") + when T_3084 : + node T_3088 = eq(T_3086, UInt<6>("h03d")) + node T_3090 = and(UInt<1>("h01"), T_3088) + node T_3093 = addw(T_3086, UInt<1>("h01")) + node T_3094 = mux(T_3090, UInt<1>("h00"), T_3093) + T_3086 := T_3094 + skip + node T_3095 = and(T_3084, T_3088) + node T_3096 = mux(r_btb_update.bits.prediction.valid, r_btb_update.bits.prediction.bits.entry, T_3086) + node T_3097 = or(T_592, T_902) + node T_3098 = and(pageReplEn, T_3097) + node T_3100 = neq(T_3098, UInt<1>("h00")) + node T_3101 = or(T_597, T_907) + node T_3102 = and(pageReplEn, T_3101) + node T_3104 = neq(T_3102, UInt<1>("h00")) + node T_3105 = or(T_602, T_912) + node T_3106 = and(pageReplEn, T_3105) + node T_3108 = neq(T_3106, UInt<1>("h00")) + node T_3109 = or(T_607, T_917) + node T_3110 = and(pageReplEn, T_3109) + node T_3112 = neq(T_3110, UInt<1>("h00")) + node T_3113 = or(T_612, T_922) + node T_3114 = and(pageReplEn, T_3113) + node T_3116 = neq(T_3114, UInt<1>("h00")) + node T_3117 = or(T_617, T_927) + node T_3118 = and(pageReplEn, T_3117) + node T_3120 = neq(T_3118, UInt<1>("h00")) + node T_3121 = or(T_622, T_932) + node T_3122 = and(pageReplEn, T_3121) + node T_3124 = neq(T_3122, UInt<1>("h00")) + node T_3125 = or(T_627, T_937) + node T_3126 = and(pageReplEn, T_3125) + node T_3128 = neq(T_3126, UInt<1>("h00")) + node T_3129 = or(T_632, T_942) + node T_3130 = and(pageReplEn, T_3129) + node T_3132 = neq(T_3130, UInt<1>("h00")) + node T_3133 = or(T_637, T_947) + node T_3134 = and(pageReplEn, T_3133) + node T_3136 = neq(T_3134, UInt<1>("h00")) + node T_3137 = or(T_642, T_952) + node T_3138 = and(pageReplEn, T_3137) + node T_3140 = neq(T_3138, UInt<1>("h00")) + node T_3141 = or(T_647, T_957) + node T_3142 = and(pageReplEn, T_3141) + node T_3144 = neq(T_3142, UInt<1>("h00")) + node T_3145 = or(T_652, T_962) + node T_3146 = and(pageReplEn, T_3145) + node T_3148 = neq(T_3146, UInt<1>("h00")) + node T_3149 = or(T_657, T_967) + node T_3150 = and(pageReplEn, T_3149) + node T_3152 = neq(T_3150, UInt<1>("h00")) + node T_3153 = or(T_662, T_972) + node T_3154 = and(pageReplEn, T_3153) + node T_3156 = neq(T_3154, UInt<1>("h00")) + node T_3157 = or(T_667, T_977) + node T_3158 = and(pageReplEn, T_3157) + node T_3160 = neq(T_3158, UInt<1>("h00")) + node T_3161 = or(T_672, T_982) + node T_3162 = and(pageReplEn, T_3161) + node T_3164 = neq(T_3162, UInt<1>("h00")) + node T_3165 = or(T_677, T_987) + node T_3166 = and(pageReplEn, T_3165) + node T_3168 = neq(T_3166, UInt<1>("h00")) + node T_3169 = or(T_682, T_992) + node T_3170 = and(pageReplEn, T_3169) + node T_3172 = neq(T_3170, UInt<1>("h00")) + node T_3173 = or(T_687, T_997) + node T_3174 = and(pageReplEn, T_3173) + node T_3176 = neq(T_3174, UInt<1>("h00")) + node T_3177 = or(T_692, T_1002) + node T_3178 = and(pageReplEn, T_3177) + node T_3180 = neq(T_3178, UInt<1>("h00")) + node T_3181 = or(T_697, T_1007) + node T_3182 = and(pageReplEn, T_3181) + node T_3184 = neq(T_3182, UInt<1>("h00")) + node T_3185 = or(T_702, T_1012) + node T_3186 = and(pageReplEn, T_3185) + node T_3188 = neq(T_3186, UInt<1>("h00")) + node T_3189 = or(T_707, T_1017) + node T_3190 = and(pageReplEn, T_3189) + node T_3192 = neq(T_3190, UInt<1>("h00")) + node T_3193 = or(T_712, T_1022) + node T_3194 = and(pageReplEn, T_3193) + node T_3196 = neq(T_3194, UInt<1>("h00")) + node T_3197 = or(T_717, T_1027) + node T_3198 = and(pageReplEn, T_3197) + node T_3200 = neq(T_3198, UInt<1>("h00")) + node T_3201 = or(T_722, T_1032) + node T_3202 = and(pageReplEn, T_3201) + node T_3204 = neq(T_3202, UInt<1>("h00")) + node T_3205 = or(T_727, T_1037) + node T_3206 = and(pageReplEn, T_3205) + node T_3208 = neq(T_3206, UInt<1>("h00")) + node T_3209 = or(T_732, T_1042) + node T_3210 = and(pageReplEn, T_3209) + node T_3212 = neq(T_3210, UInt<1>("h00")) + node T_3213 = or(T_737, T_1047) + node T_3214 = and(pageReplEn, T_3213) + node T_3216 = neq(T_3214, UInt<1>("h00")) + node T_3217 = or(T_742, T_1052) + node T_3218 = and(pageReplEn, T_3217) + node T_3220 = neq(T_3218, UInt<1>("h00")) + node T_3221 = or(T_747, T_1057) + node T_3222 = and(pageReplEn, T_3221) + node T_3224 = neq(T_3222, UInt<1>("h00")) + node T_3225 = or(T_752, T_1062) + node T_3226 = and(pageReplEn, T_3225) + node T_3228 = neq(T_3226, UInt<1>("h00")) + node T_3229 = or(T_757, T_1067) + node T_3230 = and(pageReplEn, T_3229) + node T_3232 = neq(T_3230, UInt<1>("h00")) + node T_3233 = or(T_762, T_1072) + node T_3234 = and(pageReplEn, T_3233) + node T_3236 = neq(T_3234, UInt<1>("h00")) + node T_3237 = or(T_767, T_1077) + node T_3238 = and(pageReplEn, T_3237) + node T_3240 = neq(T_3238, UInt<1>("h00")) + node T_3241 = or(T_772, T_1082) + node T_3242 = and(pageReplEn, T_3241) + node T_3244 = neq(T_3242, UInt<1>("h00")) + node T_3245 = or(T_777, T_1087) + node T_3246 = and(pageReplEn, T_3245) + node T_3248 = neq(T_3246, UInt<1>("h00")) + node T_3249 = or(T_782, T_1092) + node T_3250 = and(pageReplEn, T_3249) + node T_3252 = neq(T_3250, UInt<1>("h00")) + node T_3253 = or(T_787, T_1097) + node T_3254 = and(pageReplEn, T_3253) + node T_3256 = neq(T_3254, UInt<1>("h00")) + node T_3257 = or(T_792, T_1102) + node T_3258 = and(pageReplEn, T_3257) + node T_3260 = neq(T_3258, UInt<1>("h00")) + node T_3261 = or(T_797, T_1107) + node T_3262 = and(pageReplEn, T_3261) + node T_3264 = neq(T_3262, UInt<1>("h00")) + node T_3265 = or(T_802, T_1112) + node T_3266 = and(pageReplEn, T_3265) + node T_3268 = neq(T_3266, UInt<1>("h00")) + node T_3269 = or(T_807, T_1117) + node T_3270 = and(pageReplEn, T_3269) + node T_3272 = neq(T_3270, UInt<1>("h00")) + node T_3273 = or(T_812, T_1122) + node T_3274 = and(pageReplEn, T_3273) + node T_3276 = neq(T_3274, UInt<1>("h00")) + node T_3277 = or(T_817, T_1127) + node T_3278 = and(pageReplEn, T_3277) + node T_3280 = neq(T_3278, UInt<1>("h00")) + node T_3281 = or(T_822, T_1132) + node T_3282 = and(pageReplEn, T_3281) + node T_3284 = neq(T_3282, UInt<1>("h00")) + node T_3285 = or(T_827, T_1137) + node T_3286 = and(pageReplEn, T_3285) + node T_3288 = neq(T_3286, UInt<1>("h00")) + node T_3289 = or(T_832, T_1142) + node T_3290 = and(pageReplEn, T_3289) + node T_3292 = neq(T_3290, UInt<1>("h00")) + node T_3293 = or(T_837, T_1147) + node T_3294 = and(pageReplEn, T_3293) + node T_3296 = neq(T_3294, UInt<1>("h00")) + node T_3297 = or(T_842, T_1152) + node T_3298 = and(pageReplEn, T_3297) + node T_3300 = neq(T_3298, UInt<1>("h00")) + node T_3301 = or(T_847, T_1157) + node T_3302 = and(pageReplEn, T_3301) + node T_3304 = neq(T_3302, UInt<1>("h00")) + node T_3305 = or(T_852, T_1162) + node T_3306 = and(pageReplEn, T_3305) + node T_3308 = neq(T_3306, UInt<1>("h00")) + node T_3309 = or(T_857, T_1167) + node T_3310 = and(pageReplEn, T_3309) + node T_3312 = neq(T_3310, UInt<1>("h00")) + node T_3313 = or(T_862, T_1172) + node T_3314 = and(pageReplEn, T_3313) + node T_3316 = neq(T_3314, UInt<1>("h00")) + node T_3317 = or(T_867, T_1177) + node T_3318 = and(pageReplEn, T_3317) + node T_3320 = neq(T_3318, UInt<1>("h00")) + node T_3321 = or(T_872, T_1182) + node T_3322 = and(pageReplEn, T_3321) + node T_3324 = neq(T_3322, UInt<1>("h00")) + node T_3325 = or(T_877, T_1187) + node T_3326 = and(pageReplEn, T_3325) + node T_3328 = neq(T_3326, UInt<1>("h00")) + node T_3329 = or(T_882, T_1192) + node T_3330 = and(pageReplEn, T_3329) + node T_3332 = neq(T_3330, UInt<1>("h00")) + node T_3333 = or(T_887, T_1197) + node T_3334 = and(pageReplEn, T_3333) + node T_3336 = neq(T_3334, UInt<1>("h00")) + node T_3337 = or(T_892, T_1202) + node T_3338 = and(pageReplEn, T_3337) + node T_3340 = neq(T_3338, UInt<1>("h00")) + node T_3341 = or(T_897, T_1207) + node T_3342 = and(pageReplEn, T_3341) + node T_3344 = neq(T_3342, UInt<1>("h00")) + wire T_3346 : UInt<1>[62] + T_3346[0] := T_3100 + T_3346[1] := T_3104 + T_3346[2] := T_3108 + T_3346[3] := T_3112 + T_3346[4] := T_3116 + T_3346[5] := T_3120 + T_3346[6] := T_3124 + T_3346[7] := T_3128 + T_3346[8] := T_3132 + T_3346[9] := T_3136 + T_3346[10] := T_3140 + T_3346[11] := T_3144 + T_3346[12] := T_3148 + T_3346[13] := T_3152 + T_3346[14] := T_3156 + T_3346[15] := T_3160 + T_3346[16] := T_3164 + T_3346[17] := T_3168 + T_3346[18] := T_3172 + T_3346[19] := T_3176 + T_3346[20] := T_3180 + T_3346[21] := T_3184 + T_3346[22] := T_3188 + T_3346[23] := T_3192 + T_3346[24] := T_3196 + T_3346[25] := T_3200 + T_3346[26] := T_3204 + T_3346[27] := T_3208 + T_3346[28] := T_3212 + T_3346[29] := T_3216 + T_3346[30] := T_3220 + T_3346[31] := T_3224 + T_3346[32] := T_3228 + T_3346[33] := T_3232 + T_3346[34] := T_3236 + T_3346[35] := T_3240 + T_3346[36] := T_3244 + T_3346[37] := T_3248 + T_3346[38] := T_3252 + T_3346[39] := T_3256 + T_3346[40] := T_3260 + T_3346[41] := T_3264 + T_3346[42] := T_3268 + T_3346[43] := T_3272 + T_3346[44] := T_3276 + T_3346[45] := T_3280 + T_3346[46] := T_3284 + T_3346[47] := T_3288 + T_3346[48] := T_3292 + T_3346[49] := T_3296 + T_3346[50] := T_3300 + T_3346[51] := T_3304 + T_3346[52] := T_3308 + T_3346[53] := T_3312 + T_3346[54] := T_3316 + T_3346[55] := T_3320 + T_3346[56] := T_3324 + T_3346[57] := T_3328 + T_3346[58] := T_3332 + T_3346[59] := T_3336 + T_3346[60] := T_3340 + T_3346[61] := T_3344 + node T_3410 = cat(T_3346[60], T_3346[59]) + node T_3411 = cat(T_3346[61], T_3410) + node T_3412 = cat(T_3346[58], T_3346[57]) + node T_3413 = cat(T_3346[56], T_3346[55]) + node T_3414 = cat(T_3412, T_3413) + node T_3415 = cat(T_3411, T_3414) + node T_3416 = cat(T_3346[54], T_3346[53]) + node T_3417 = cat(T_3346[52], T_3346[51]) + node T_3418 = cat(T_3416, T_3417) + node T_3419 = cat(T_3346[50], T_3346[49]) + node T_3420 = cat(T_3346[48], T_3346[47]) + node T_3421 = cat(T_3419, T_3420) + node T_3422 = cat(T_3418, T_3421) + node T_3423 = cat(T_3415, T_3422) + node T_3424 = cat(T_3346[46], T_3346[45]) + node T_3425 = cat(T_3346[44], T_3346[43]) + node T_3426 = cat(T_3424, T_3425) + node T_3427 = cat(T_3346[42], T_3346[41]) + node T_3428 = cat(T_3346[40], T_3346[39]) + node T_3429 = cat(T_3427, T_3428) + node T_3430 = cat(T_3426, T_3429) + node T_3431 = cat(T_3346[38], T_3346[37]) + node T_3432 = cat(T_3346[36], T_3346[35]) + node T_3433 = cat(T_3431, T_3432) + node T_3434 = cat(T_3346[34], T_3346[33]) + node T_3435 = cat(T_3346[32], T_3346[31]) + node T_3436 = cat(T_3434, T_3435) + node T_3437 = cat(T_3433, T_3436) + node T_3438 = cat(T_3430, T_3437) + node T_3439 = cat(T_3423, T_3438) + node T_3440 = cat(T_3346[29], T_3346[28]) + node T_3441 = cat(T_3346[30], T_3440) + node T_3442 = cat(T_3346[27], T_3346[26]) + node T_3443 = cat(T_3346[25], T_3346[24]) + node T_3444 = cat(T_3442, T_3443) + node T_3445 = cat(T_3441, T_3444) + node T_3446 = cat(T_3346[23], T_3346[22]) + node T_3447 = cat(T_3346[21], T_3346[20]) + node T_3448 = cat(T_3446, T_3447) + node T_3449 = cat(T_3346[19], T_3346[18]) + node T_3450 = cat(T_3346[17], T_3346[16]) + node T_3451 = cat(T_3449, T_3450) + node T_3452 = cat(T_3448, T_3451) + node T_3453 = cat(T_3445, T_3452) + node T_3454 = cat(T_3346[15], T_3346[14]) + node T_3455 = cat(T_3346[13], T_3346[12]) + node T_3456 = cat(T_3454, T_3455) + node T_3457 = cat(T_3346[11], T_3346[10]) + node T_3458 = cat(T_3346[9], T_3346[8]) + node T_3459 = cat(T_3457, T_3458) + node T_3460 = cat(T_3456, T_3459) + node T_3461 = cat(T_3346[7], T_3346[6]) + node T_3462 = cat(T_3346[5], T_3346[4]) + node T_3463 = cat(T_3461, T_3462) + node T_3464 = cat(T_3346[3], T_3346[2]) + node T_3465 = cat(T_3346[1], T_3346[0]) + node T_3466 = cat(T_3464, T_3465) + node T_3467 = cat(T_3463, T_3466) + node T_3468 = cat(T_3460, T_3467) + node T_3469 = cat(T_3453, T_3468) + node T_3470 = cat(T_3439, T_3469) + node T_3472 = dshl(UInt<1>("h01"), T_3096) + node T_3473 = not(T_3470) + node T_3474 = and(idxValid, T_3473) + node T_3475 = or(T_3474, T_3472) + idxValid := T_3475 + infer accessor T_3476 = idxs[T_3096] + T_3476 := r_btb_update.bits.pc + infer accessor T_3477 = tgts[T_3096] + T_3477 := req.bits.addr + infer accessor T_3478 = idxPages[T_3096] + T_3478 := idxPageUpdate + infer accessor T_3479 = tgtPages[T_3096] + T_3479 := tgtPageUpdate + infer accessor T_3480 = useRAS[T_3096] + T_3480 := r_btb_update.bits.isReturn + infer accessor T_3481 = isJump[T_3096] + T_3481 := r_btb_update.bits.isJump + infer accessor T_3482 = brIdx[T_3096] + T_3482 := UInt<1>("h00") + node T_3485 = cat(UInt<2>("h01"), UInt<2>("h01")) + node T_3486 = cat(UInt<2>("h01"), T_3485) + node T_3487 = and(idxPageUpdateOH, T_3486) + node T_3489 = neq(T_3487, UInt<1>("h00")) + node T_3490 = mux(T_3489, doIdxPageRepl, doTgtPageRepl) + node T_3491 = shr(r_btb_update.bits.pc, 12) + node T_3492 = shr(req.bits.addr, 12) + node T_3493 = mux(T_3489, T_3491, T_3492) + node T_3494 = bit(pageReplEn, 0) + node T_3495 = and(T_3490, T_3494) + when T_3495 : + infer accessor T_3497 = pages[UInt<1>("h00")] + T_3497 := T_3493 + skip + node T_3498 = bit(pageReplEn, 2) + node T_3499 = and(T_3490, T_3498) + when T_3499 : + infer accessor T_3501 = pages[UInt<2>("h02")] + T_3501 := T_3493 + skip + node T_3502 = bit(pageReplEn, 4) + node T_3503 = and(T_3490, T_3502) + when T_3503 : + infer accessor T_3505 = pages[UInt<3>("h04")] + T_3505 := T_3493 + skip + node T_3506 = mux(T_3489, doTgtPageRepl, doIdxPageRepl) + node T_3507 = shr(req.bits.addr, 12) + node T_3508 = shr(r_btb_update.bits.pc, 12) + node T_3509 = mux(T_3489, T_3507, T_3508) + node T_3510 = bit(pageReplEn, 1) + node T_3511 = and(T_3506, T_3510) + when T_3511 : + infer accessor T_3513 = pages[UInt<1>("h01")] + T_3513 := T_3509 + skip + node T_3514 = bit(pageReplEn, 3) + node T_3515 = and(T_3506, T_3514) + when T_3515 : + infer accessor T_3517 = pages[UInt<2>("h03")] + T_3517 := T_3509 + skip + node T_3518 = bit(pageReplEn, 5) + node T_3519 = and(T_3506, T_3518) + when T_3519 : + infer accessor T_3521 = pages[UInt<3>("h05")] + T_3521 := T_3509 + skip + when doPageRepl : + node T_3522 = or(pageValid, pageReplEn) + pageValid := T_3522 + skip + skip + when invalidate : + idxValid := UInt<1>("h00") + pageValid := UInt<1>("h00") + skip + node T_3526 = neq(hits, UInt<1>("h00")) + resp.valid := T_3526 + resp.bits.taken := resp.valid + node T_3527 = bit(hits, 0) + node T_3528 = bit(hits, 1) + node T_3529 = bit(hits, 2) + node T_3530 = bit(hits, 3) + node T_3531 = bit(hits, 4) + node T_3532 = bit(hits, 5) + node T_3533 = bit(hits, 6) + node T_3534 = bit(hits, 7) + node T_3535 = bit(hits, 8) + node T_3536 = bit(hits, 9) + node T_3537 = bit(hits, 10) + node T_3538 = bit(hits, 11) + node T_3539 = bit(hits, 12) + node T_3540 = bit(hits, 13) + node T_3541 = bit(hits, 14) + node T_3542 = bit(hits, 15) + node T_3543 = bit(hits, 16) + node T_3544 = bit(hits, 17) + node T_3545 = bit(hits, 18) + node T_3546 = bit(hits, 19) + node T_3547 = bit(hits, 20) + node T_3548 = bit(hits, 21) + node T_3549 = bit(hits, 22) + node T_3550 = bit(hits, 23) + node T_3551 = bit(hits, 24) + node T_3552 = bit(hits, 25) + node T_3553 = bit(hits, 26) + node T_3554 = bit(hits, 27) + node T_3555 = bit(hits, 28) + node T_3556 = bit(hits, 29) + node T_3557 = bit(hits, 30) + node T_3558 = bit(hits, 31) + node T_3559 = bit(hits, 32) + node T_3560 = bit(hits, 33) + node T_3561 = bit(hits, 34) + node T_3562 = bit(hits, 35) + node T_3563 = bit(hits, 36) + node T_3564 = bit(hits, 37) + node T_3565 = bit(hits, 38) + node T_3566 = bit(hits, 39) + node T_3567 = bit(hits, 40) + node T_3568 = bit(hits, 41) + node T_3569 = bit(hits, 42) + node T_3570 = bit(hits, 43) + node T_3571 = bit(hits, 44) + node T_3572 = bit(hits, 45) + node T_3573 = bit(hits, 46) + node T_3574 = bit(hits, 47) + node T_3575 = bit(hits, 48) + node T_3576 = bit(hits, 49) + node T_3577 = bit(hits, 50) + node T_3578 = bit(hits, 51) + node T_3579 = bit(hits, 52) + node T_3580 = bit(hits, 53) + node T_3581 = bit(hits, 54) + node T_3582 = bit(hits, 55) + node T_3583 = bit(hits, 56) + node T_3584 = bit(hits, 57) + node T_3585 = bit(hits, 58) + node T_3586 = bit(hits, 59) + node T_3587 = bit(hits, 60) + node T_3588 = bit(hits, 61) + node T_3590 = mux(T_3527, T_902, UInt<1>("h00")) + node T_3592 = mux(T_3528, T_907, UInt<1>("h00")) + node T_3594 = mux(T_3529, T_912, UInt<1>("h00")) + node T_3596 = mux(T_3530, T_917, UInt<1>("h00")) + node T_3598 = mux(T_3531, T_922, UInt<1>("h00")) + node T_3600 = mux(T_3532, T_927, UInt<1>("h00")) + node T_3602 = mux(T_3533, T_932, UInt<1>("h00")) + node T_3604 = mux(T_3534, T_937, UInt<1>("h00")) + node T_3606 = mux(T_3535, T_942, UInt<1>("h00")) + node T_3608 = mux(T_3536, T_947, UInt<1>("h00")) + node T_3610 = mux(T_3537, T_952, UInt<1>("h00")) + node T_3612 = mux(T_3538, T_957, UInt<1>("h00")) + node T_3614 = mux(T_3539, T_962, UInt<1>("h00")) + node T_3616 = mux(T_3540, T_967, UInt<1>("h00")) + node T_3618 = mux(T_3541, T_972, UInt<1>("h00")) + node T_3620 = mux(T_3542, T_977, UInt<1>("h00")) + node T_3622 = mux(T_3543, T_982, UInt<1>("h00")) + node T_3624 = mux(T_3544, T_987, UInt<1>("h00")) + node T_3626 = mux(T_3545, T_992, UInt<1>("h00")) + node T_3628 = mux(T_3546, T_997, UInt<1>("h00")) + node T_3630 = mux(T_3547, T_1002, UInt<1>("h00")) + node T_3632 = mux(T_3548, T_1007, UInt<1>("h00")) + node T_3634 = mux(T_3549, T_1012, UInt<1>("h00")) + node T_3636 = mux(T_3550, T_1017, UInt<1>("h00")) + node T_3638 = mux(T_3551, T_1022, UInt<1>("h00")) + node T_3640 = mux(T_3552, T_1027, UInt<1>("h00")) + node T_3642 = mux(T_3553, T_1032, UInt<1>("h00")) + node T_3644 = mux(T_3554, T_1037, UInt<1>("h00")) + node T_3646 = mux(T_3555, T_1042, UInt<1>("h00")) + node T_3648 = mux(T_3556, T_1047, UInt<1>("h00")) + node T_3650 = mux(T_3557, T_1052, UInt<1>("h00")) + node T_3652 = mux(T_3558, T_1057, UInt<1>("h00")) + node T_3654 = mux(T_3559, T_1062, UInt<1>("h00")) + node T_3656 = mux(T_3560, T_1067, UInt<1>("h00")) + node T_3658 = mux(T_3561, T_1072, UInt<1>("h00")) + node T_3660 = mux(T_3562, T_1077, UInt<1>("h00")) + node T_3662 = mux(T_3563, T_1082, UInt<1>("h00")) + node T_3664 = mux(T_3564, T_1087, UInt<1>("h00")) + node T_3666 = mux(T_3565, T_1092, UInt<1>("h00")) + node T_3668 = mux(T_3566, T_1097, UInt<1>("h00")) + node T_3670 = mux(T_3567, T_1102, UInt<1>("h00")) + node T_3672 = mux(T_3568, T_1107, UInt<1>("h00")) + node T_3674 = mux(T_3569, T_1112, UInt<1>("h00")) + node T_3676 = mux(T_3570, T_1117, UInt<1>("h00")) + node T_3678 = mux(T_3571, T_1122, UInt<1>("h00")) + node T_3680 = mux(T_3572, T_1127, UInt<1>("h00")) + node T_3682 = mux(T_3573, T_1132, UInt<1>("h00")) + node T_3684 = mux(T_3574, T_1137, UInt<1>("h00")) + node T_3686 = mux(T_3575, T_1142, UInt<1>("h00")) + node T_3688 = mux(T_3576, T_1147, UInt<1>("h00")) + node T_3690 = mux(T_3577, T_1152, UInt<1>("h00")) + node T_3692 = mux(T_3578, T_1157, UInt<1>("h00")) + node T_3694 = mux(T_3579, T_1162, UInt<1>("h00")) + node T_3696 = mux(T_3580, T_1167, UInt<1>("h00")) + node T_3698 = mux(T_3581, T_1172, UInt<1>("h00")) + node T_3700 = mux(T_3582, T_1177, UInt<1>("h00")) + node T_3702 = mux(T_3583, T_1182, UInt<1>("h00")) + node T_3704 = mux(T_3584, T_1187, UInt<1>("h00")) + node T_3706 = mux(T_3585, T_1192, UInt<1>("h00")) + node T_3708 = mux(T_3586, T_1197, UInt<1>("h00")) + node T_3710 = mux(T_3587, T_1202, UInt<1>("h00")) + node T_3712 = mux(T_3588, T_1207, UInt<1>("h00")) + node T_3714 = or(T_3590, T_3592) + node T_3715 = or(T_3714, T_3594) + node T_3716 = or(T_3715, T_3596) + node T_3717 = or(T_3716, T_3598) + node T_3718 = or(T_3717, T_3600) + node T_3719 = or(T_3718, T_3602) + node T_3720 = or(T_3719, T_3604) + node T_3721 = or(T_3720, T_3606) + node T_3722 = or(T_3721, T_3608) + node T_3723 = or(T_3722, T_3610) + node T_3724 = or(T_3723, T_3612) + node T_3725 = or(T_3724, T_3614) + node T_3726 = or(T_3725, T_3616) + node T_3727 = or(T_3726, T_3618) + node T_3728 = or(T_3727, T_3620) + node T_3729 = or(T_3728, T_3622) + node T_3730 = or(T_3729, T_3624) + node T_3731 = or(T_3730, T_3626) + node T_3732 = or(T_3731, T_3628) + node T_3733 = or(T_3732, T_3630) + node T_3734 = or(T_3733, T_3632) + node T_3735 = or(T_3734, T_3634) + node T_3736 = or(T_3735, T_3636) + node T_3737 = or(T_3736, T_3638) + node T_3738 = or(T_3737, T_3640) + node T_3739 = or(T_3738, T_3642) + node T_3740 = or(T_3739, T_3644) + node T_3741 = or(T_3740, T_3646) + node T_3742 = or(T_3741, T_3648) + node T_3743 = or(T_3742, T_3650) + node T_3744 = or(T_3743, T_3652) + node T_3745 = or(T_3744, T_3654) + node T_3746 = or(T_3745, T_3656) + node T_3747 = or(T_3746, T_3658) + node T_3748 = or(T_3747, T_3660) + node T_3749 = or(T_3748, T_3662) + node T_3750 = or(T_3749, T_3664) + node T_3751 = or(T_3750, T_3666) + node T_3752 = or(T_3751, T_3668) + node T_3753 = or(T_3752, T_3670) + node T_3754 = or(T_3753, T_3672) + node T_3755 = or(T_3754, T_3674) + node T_3756 = or(T_3755, T_3676) + node T_3757 = or(T_3756, T_3678) + node T_3758 = or(T_3757, T_3680) + node T_3759 = or(T_3758, T_3682) + node T_3760 = or(T_3759, T_3684) + node T_3761 = or(T_3760, T_3686) + node T_3762 = or(T_3761, T_3688) + node T_3763 = or(T_3762, T_3690) + node T_3764 = or(T_3763, T_3692) + node T_3765 = or(T_3764, T_3694) + node T_3766 = or(T_3765, T_3696) + node T_3767 = or(T_3766, T_3698) + node T_3768 = or(T_3767, T_3700) + node T_3769 = or(T_3768, T_3702) + node T_3770 = or(T_3769, T_3704) + node T_3771 = or(T_3770, T_3706) + node T_3772 = or(T_3771, T_3708) + node T_3773 = or(T_3772, T_3710) + node T_3774 = or(T_3773, T_3712) + wire T_3775 : UInt<6> + T_3775 := UInt<1>("h00") + T_3775 := T_3774 + node T_3777 = bit(T_3775, 0) + node T_3778 = bit(T_3775, 1) + node T_3779 = bit(T_3775, 2) + node T_3780 = bit(T_3775, 3) + node T_3781 = bit(T_3775, 4) + node T_3782 = bit(T_3775, 5) + infer accessor T_3784 = pages[UInt<1>("h00")] + infer accessor T_3786 = pages[UInt<1>("h01")] + infer accessor T_3788 = pages[UInt<2>("h02")] + infer accessor T_3790 = pages[UInt<2>("h03")] + infer accessor T_3792 = pages[UInt<3>("h04")] + infer accessor T_3794 = pages[UInt<3>("h05")] + node T_3796 = mux(T_3777, T_3784, UInt<1>("h00")) + node T_3798 = mux(T_3778, T_3786, UInt<1>("h00")) + node T_3800 = mux(T_3779, T_3788, UInt<1>("h00")) + node T_3802 = mux(T_3780, T_3790, UInt<1>("h00")) + node T_3804 = mux(T_3781, T_3792, UInt<1>("h00")) + node T_3806 = mux(T_3782, T_3794, UInt<1>("h00")) + node T_3808 = or(T_3796, T_3798) + node T_3809 = or(T_3808, T_3800) + node T_3810 = or(T_3809, T_3802) + node T_3811 = or(T_3810, T_3804) + node T_3812 = or(T_3811, T_3806) + wire T_3813 : UInt<27> + T_3813 := UInt<1>("h00") + T_3813 := T_3812 + node T_3815 = bit(hits, 0) + node T_3816 = bit(hits, 1) + node T_3817 = bit(hits, 2) + node T_3818 = bit(hits, 3) + node T_3819 = bit(hits, 4) + node T_3820 = bit(hits, 5) + node T_3821 = bit(hits, 6) + node T_3822 = bit(hits, 7) + node T_3823 = bit(hits, 8) + node T_3824 = bit(hits, 9) + node T_3825 = bit(hits, 10) + node T_3826 = bit(hits, 11) + node T_3827 = bit(hits, 12) + node T_3828 = bit(hits, 13) + node T_3829 = bit(hits, 14) + node T_3830 = bit(hits, 15) + node T_3831 = bit(hits, 16) + node T_3832 = bit(hits, 17) + node T_3833 = bit(hits, 18) + node T_3834 = bit(hits, 19) + node T_3835 = bit(hits, 20) + node T_3836 = bit(hits, 21) + node T_3837 = bit(hits, 22) + node T_3838 = bit(hits, 23) + node T_3839 = bit(hits, 24) + node T_3840 = bit(hits, 25) + node T_3841 = bit(hits, 26) + node T_3842 = bit(hits, 27) + node T_3843 = bit(hits, 28) + node T_3844 = bit(hits, 29) + node T_3845 = bit(hits, 30) + node T_3846 = bit(hits, 31) + node T_3847 = bit(hits, 32) + node T_3848 = bit(hits, 33) + node T_3849 = bit(hits, 34) + node T_3850 = bit(hits, 35) + node T_3851 = bit(hits, 36) + node T_3852 = bit(hits, 37) + node T_3853 = bit(hits, 38) + node T_3854 = bit(hits, 39) + node T_3855 = bit(hits, 40) + node T_3856 = bit(hits, 41) + node T_3857 = bit(hits, 42) + node T_3858 = bit(hits, 43) + node T_3859 = bit(hits, 44) + node T_3860 = bit(hits, 45) + node T_3861 = bit(hits, 46) + node T_3862 = bit(hits, 47) + node T_3863 = bit(hits, 48) + node T_3864 = bit(hits, 49) + node T_3865 = bit(hits, 50) + node T_3866 = bit(hits, 51) + node T_3867 = bit(hits, 52) + node T_3868 = bit(hits, 53) + node T_3869 = bit(hits, 54) + node T_3870 = bit(hits, 55) + node T_3871 = bit(hits, 56) + node T_3872 = bit(hits, 57) + node T_3873 = bit(hits, 58) + node T_3874 = bit(hits, 59) + node T_3875 = bit(hits, 60) + node T_3876 = bit(hits, 61) + infer accessor T_3878 = tgts[UInt<1>("h00")] + infer accessor T_3880 = tgts[UInt<1>("h01")] + infer accessor T_3882 = tgts[UInt<2>("h02")] + infer accessor T_3884 = tgts[UInt<2>("h03")] + infer accessor T_3886 = tgts[UInt<3>("h04")] + infer accessor T_3888 = tgts[UInt<3>("h05")] + infer accessor T_3890 = tgts[UInt<3>("h06")] + infer accessor T_3892 = tgts[UInt<3>("h07")] + infer accessor T_3894 = tgts[UInt<4>("h08")] + infer accessor T_3896 = tgts[UInt<4>("h09")] + infer accessor T_3898 = tgts[UInt<4>("h0a")] + infer accessor T_3900 = tgts[UInt<4>("h0b")] + infer accessor T_3902 = tgts[UInt<4>("h0c")] + infer accessor T_3904 = tgts[UInt<4>("h0d")] + infer accessor T_3906 = tgts[UInt<4>("h0e")] + infer accessor T_3908 = tgts[UInt<4>("h0f")] + infer accessor T_3910 = tgts[UInt<5>("h010")] + infer accessor T_3912 = tgts[UInt<5>("h011")] + infer accessor T_3914 = tgts[UInt<5>("h012")] + infer accessor T_3916 = tgts[UInt<5>("h013")] + infer accessor T_3918 = tgts[UInt<5>("h014")] + infer accessor T_3920 = tgts[UInt<5>("h015")] + infer accessor T_3922 = tgts[UInt<5>("h016")] + infer accessor T_3924 = tgts[UInt<5>("h017")] + infer accessor T_3926 = tgts[UInt<5>("h018")] + infer accessor T_3928 = tgts[UInt<5>("h019")] + infer accessor T_3930 = tgts[UInt<5>("h01a")] + infer accessor T_3932 = tgts[UInt<5>("h01b")] + infer accessor T_3934 = tgts[UInt<5>("h01c")] + infer accessor T_3936 = tgts[UInt<5>("h01d")] + infer accessor T_3938 = tgts[UInt<5>("h01e")] + infer accessor T_3940 = tgts[UInt<5>("h01f")] + infer accessor T_3942 = tgts[UInt<6>("h020")] + infer accessor T_3944 = tgts[UInt<6>("h021")] + infer accessor T_3946 = tgts[UInt<6>("h022")] + infer accessor T_3948 = tgts[UInt<6>("h023")] + infer accessor T_3950 = tgts[UInt<6>("h024")] + infer accessor T_3952 = tgts[UInt<6>("h025")] + infer accessor T_3954 = tgts[UInt<6>("h026")] + infer accessor T_3956 = tgts[UInt<6>("h027")] + infer accessor T_3958 = tgts[UInt<6>("h028")] + infer accessor T_3960 = tgts[UInt<6>("h029")] + infer accessor T_3962 = tgts[UInt<6>("h02a")] + infer accessor T_3964 = tgts[UInt<6>("h02b")] + infer accessor T_3966 = tgts[UInt<6>("h02c")] + infer accessor T_3968 = tgts[UInt<6>("h02d")] + infer accessor T_3970 = tgts[UInt<6>("h02e")] + infer accessor T_3972 = tgts[UInt<6>("h02f")] + infer accessor T_3974 = tgts[UInt<6>("h030")] + infer accessor T_3976 = tgts[UInt<6>("h031")] + infer accessor T_3978 = tgts[UInt<6>("h032")] + infer accessor T_3980 = tgts[UInt<6>("h033")] + infer accessor T_3982 = tgts[UInt<6>("h034")] + infer accessor T_3984 = tgts[UInt<6>("h035")] + infer accessor T_3986 = tgts[UInt<6>("h036")] + infer accessor T_3988 = tgts[UInt<6>("h037")] + infer accessor T_3990 = tgts[UInt<6>("h038")] + infer accessor T_3992 = tgts[UInt<6>("h039")] + infer accessor T_3994 = tgts[UInt<6>("h03a")] + infer accessor T_3996 = tgts[UInt<6>("h03b")] + infer accessor T_3998 = tgts[UInt<6>("h03c")] + infer accessor T_4000 = tgts[UInt<6>("h03d")] + node T_4002 = mux(T_3815, T_3878, UInt<1>("h00")) + node T_4004 = mux(T_3816, T_3880, UInt<1>("h00")) + node T_4006 = mux(T_3817, T_3882, UInt<1>("h00")) + node T_4008 = mux(T_3818, T_3884, UInt<1>("h00")) + node T_4010 = mux(T_3819, T_3886, UInt<1>("h00")) + node T_4012 = mux(T_3820, T_3888, UInt<1>("h00")) + node T_4014 = mux(T_3821, T_3890, UInt<1>("h00")) + node T_4016 = mux(T_3822, T_3892, UInt<1>("h00")) + node T_4018 = mux(T_3823, T_3894, UInt<1>("h00")) + node T_4020 = mux(T_3824, T_3896, UInt<1>("h00")) + node T_4022 = mux(T_3825, T_3898, UInt<1>("h00")) + node T_4024 = mux(T_3826, T_3900, UInt<1>("h00")) + node T_4026 = mux(T_3827, T_3902, UInt<1>("h00")) + node T_4028 = mux(T_3828, T_3904, UInt<1>("h00")) + node T_4030 = mux(T_3829, T_3906, UInt<1>("h00")) + node T_4032 = mux(T_3830, T_3908, UInt<1>("h00")) + node T_4034 = mux(T_3831, T_3910, UInt<1>("h00")) + node T_4036 = mux(T_3832, T_3912, UInt<1>("h00")) + node T_4038 = mux(T_3833, T_3914, UInt<1>("h00")) + node T_4040 = mux(T_3834, T_3916, UInt<1>("h00")) + node T_4042 = mux(T_3835, T_3918, UInt<1>("h00")) + node T_4044 = mux(T_3836, T_3920, UInt<1>("h00")) + node T_4046 = mux(T_3837, T_3922, UInt<1>("h00")) + node T_4048 = mux(T_3838, T_3924, UInt<1>("h00")) + node T_4050 = mux(T_3839, T_3926, UInt<1>("h00")) + node T_4052 = mux(T_3840, T_3928, UInt<1>("h00")) + node T_4054 = mux(T_3841, T_3930, UInt<1>("h00")) + node T_4056 = mux(T_3842, T_3932, UInt<1>("h00")) + node T_4058 = mux(T_3843, T_3934, UInt<1>("h00")) + node T_4060 = mux(T_3844, T_3936, UInt<1>("h00")) + node T_4062 = mux(T_3845, T_3938, UInt<1>("h00")) + node T_4064 = mux(T_3846, T_3940, UInt<1>("h00")) + node T_4066 = mux(T_3847, T_3942, UInt<1>("h00")) + node T_4068 = mux(T_3848, T_3944, UInt<1>("h00")) + node T_4070 = mux(T_3849, T_3946, UInt<1>("h00")) + node T_4072 = mux(T_3850, T_3948, UInt<1>("h00")) + node T_4074 = mux(T_3851, T_3950, UInt<1>("h00")) + node T_4076 = mux(T_3852, T_3952, UInt<1>("h00")) + node T_4078 = mux(T_3853, T_3954, UInt<1>("h00")) + node T_4080 = mux(T_3854, T_3956, UInt<1>("h00")) + node T_4082 = mux(T_3855, T_3958, UInt<1>("h00")) + node T_4084 = mux(T_3856, T_3960, UInt<1>("h00")) + node T_4086 = mux(T_3857, T_3962, UInt<1>("h00")) + node T_4088 = mux(T_3858, T_3964, UInt<1>("h00")) + node T_4090 = mux(T_3859, T_3966, UInt<1>("h00")) + node T_4092 = mux(T_3860, T_3968, UInt<1>("h00")) + node T_4094 = mux(T_3861, T_3970, UInt<1>("h00")) + node T_4096 = mux(T_3862, T_3972, UInt<1>("h00")) + node T_4098 = mux(T_3863, T_3974, UInt<1>("h00")) + node T_4100 = mux(T_3864, T_3976, UInt<1>("h00")) + node T_4102 = mux(T_3865, T_3978, UInt<1>("h00")) + node T_4104 = mux(T_3866, T_3980, UInt<1>("h00")) + node T_4106 = mux(T_3867, T_3982, UInt<1>("h00")) + node T_4108 = mux(T_3868, T_3984, UInt<1>("h00")) + node T_4110 = mux(T_3869, T_3986, UInt<1>("h00")) + node T_4112 = mux(T_3870, T_3988, UInt<1>("h00")) + node T_4114 = mux(T_3871, T_3990, UInt<1>("h00")) + node T_4116 = mux(T_3872, T_3992, UInt<1>("h00")) + node T_4118 = mux(T_3873, T_3994, UInt<1>("h00")) + node T_4120 = mux(T_3874, T_3996, UInt<1>("h00")) + node T_4122 = mux(T_3875, T_3998, UInt<1>("h00")) + node T_4124 = mux(T_3876, T_4000, UInt<1>("h00")) + node T_4126 = or(T_4002, T_4004) + node T_4127 = or(T_4126, T_4006) + node T_4128 = or(T_4127, T_4008) + node T_4129 = or(T_4128, T_4010) + node T_4130 = or(T_4129, T_4012) + node T_4131 = or(T_4130, T_4014) + node T_4132 = or(T_4131, T_4016) + node T_4133 = or(T_4132, T_4018) + node T_4134 = or(T_4133, T_4020) + node T_4135 = or(T_4134, T_4022) + node T_4136 = or(T_4135, T_4024) + node T_4137 = or(T_4136, T_4026) + node T_4138 = or(T_4137, T_4028) + node T_4139 = or(T_4138, T_4030) + node T_4140 = or(T_4139, T_4032) + node T_4141 = or(T_4140, T_4034) + node T_4142 = or(T_4141, T_4036) + node T_4143 = or(T_4142, T_4038) + node T_4144 = or(T_4143, T_4040) + node T_4145 = or(T_4144, T_4042) + node T_4146 = or(T_4145, T_4044) + node T_4147 = or(T_4146, T_4046) + node T_4148 = or(T_4147, T_4048) + node T_4149 = or(T_4148, T_4050) + node T_4150 = or(T_4149, T_4052) + node T_4151 = or(T_4150, T_4054) + node T_4152 = or(T_4151, T_4056) + node T_4153 = or(T_4152, T_4058) + node T_4154 = or(T_4153, T_4060) + node T_4155 = or(T_4154, T_4062) + node T_4156 = or(T_4155, T_4064) + node T_4157 = or(T_4156, T_4066) + node T_4158 = or(T_4157, T_4068) + node T_4159 = or(T_4158, T_4070) + node T_4160 = or(T_4159, T_4072) + node T_4161 = or(T_4160, T_4074) + node T_4162 = or(T_4161, T_4076) + node T_4163 = or(T_4162, T_4078) + node T_4164 = or(T_4163, T_4080) + node T_4165 = or(T_4164, T_4082) + node T_4166 = or(T_4165, T_4084) + node T_4167 = or(T_4166, T_4086) + node T_4168 = or(T_4167, T_4088) + node T_4169 = or(T_4168, T_4090) + node T_4170 = or(T_4169, T_4092) + node T_4171 = or(T_4170, T_4094) + node T_4172 = or(T_4171, T_4096) + node T_4173 = or(T_4172, T_4098) + node T_4174 = or(T_4173, T_4100) + node T_4175 = or(T_4174, T_4102) + node T_4176 = or(T_4175, T_4104) + node T_4177 = or(T_4176, T_4106) + node T_4178 = or(T_4177, T_4108) + node T_4179 = or(T_4178, T_4110) + node T_4180 = or(T_4179, T_4112) + node T_4181 = or(T_4180, T_4114) + node T_4182 = or(T_4181, T_4116) + node T_4183 = or(T_4182, T_4118) + node T_4184 = or(T_4183, T_4120) + node T_4185 = or(T_4184, T_4122) + node T_4186 = or(T_4185, T_4124) + wire T_4187 : UInt<12> + T_4187 := UInt<1>("h00") + T_4187 := T_4186 + node T_4189 = cat(T_3813, T_4187) + resp.bits.target := T_4189 + node T_4190 = bits(hits, 61, 32) + node T_4191 = bits(hits, 31, 0) + node T_4193 = neq(T_4190, UInt<1>("h00")) + node T_4194 = or(T_4190, T_4191) + node T_4195 = bits(T_4194, 31, 16) + node T_4196 = bits(T_4194, 15, 0) + node T_4198 = neq(T_4195, UInt<1>("h00")) + node T_4199 = or(T_4195, T_4196) + node T_4200 = bits(T_4199, 15, 8) + node T_4201 = bits(T_4199, 7, 0) + node T_4203 = neq(T_4200, UInt<1>("h00")) + node T_4204 = or(T_4200, T_4201) + node T_4205 = bits(T_4204, 7, 4) + node T_4206 = bits(T_4204, 3, 0) + node T_4208 = neq(T_4205, UInt<1>("h00")) + node T_4209 = or(T_4205, T_4206) + node T_4210 = bits(T_4209, 3, 2) + node T_4211 = bits(T_4209, 1, 0) + node T_4213 = neq(T_4210, UInt<1>("h00")) + node T_4214 = or(T_4210, T_4211) + node T_4215 = bit(T_4214, 1) + node T_4216 = cat(T_4213, T_4215) + node T_4217 = cat(T_4208, T_4216) + node T_4218 = cat(T_4203, T_4217) + node T_4219 = cat(T_4198, T_4218) + node T_4220 = cat(T_4193, T_4219) + resp.bits.entry := T_4220 + infer accessor T_4221 = brIdx[resp.bits.entry] + resp.bits.bridx := T_4221 + resp.bits.mask := UInt<1>("h01") + cmem T_4225 : UInt<2>[128], clock + reg T_4227 : UInt<7>, clock, reset + node T_4228 = bit(hits, 0) + node T_4229 = bit(hits, 1) + node T_4230 = bit(hits, 2) + node T_4231 = bit(hits, 3) + node T_4232 = bit(hits, 4) + node T_4233 = bit(hits, 5) + node T_4234 = bit(hits, 6) + node T_4235 = bit(hits, 7) + node T_4236 = bit(hits, 8) + node T_4237 = bit(hits, 9) + node T_4238 = bit(hits, 10) + node T_4239 = bit(hits, 11) + node T_4240 = bit(hits, 12) + node T_4241 = bit(hits, 13) + node T_4242 = bit(hits, 14) + node T_4243 = bit(hits, 15) + node T_4244 = bit(hits, 16) + node T_4245 = bit(hits, 17) + node T_4246 = bit(hits, 18) + node T_4247 = bit(hits, 19) + node T_4248 = bit(hits, 20) + node T_4249 = bit(hits, 21) + node T_4250 = bit(hits, 22) + node T_4251 = bit(hits, 23) + node T_4252 = bit(hits, 24) + node T_4253 = bit(hits, 25) + node T_4254 = bit(hits, 26) + node T_4255 = bit(hits, 27) + node T_4256 = bit(hits, 28) + node T_4257 = bit(hits, 29) + node T_4258 = bit(hits, 30) + node T_4259 = bit(hits, 31) + node T_4260 = bit(hits, 32) + node T_4261 = bit(hits, 33) + node T_4262 = bit(hits, 34) + node T_4263 = bit(hits, 35) + node T_4264 = bit(hits, 36) + node T_4265 = bit(hits, 37) + node T_4266 = bit(hits, 38) + node T_4267 = bit(hits, 39) + node T_4268 = bit(hits, 40) + node T_4269 = bit(hits, 41) + node T_4270 = bit(hits, 42) + node T_4271 = bit(hits, 43) + node T_4272 = bit(hits, 44) + node T_4273 = bit(hits, 45) + node T_4274 = bit(hits, 46) + node T_4275 = bit(hits, 47) + node T_4276 = bit(hits, 48) + node T_4277 = bit(hits, 49) + node T_4278 = bit(hits, 50) + node T_4279 = bit(hits, 51) + node T_4280 = bit(hits, 52) + node T_4281 = bit(hits, 53) + node T_4282 = bit(hits, 54) + node T_4283 = bit(hits, 55) + node T_4284 = bit(hits, 56) + node T_4285 = bit(hits, 57) + node T_4286 = bit(hits, 58) + node T_4287 = bit(hits, 59) + node T_4288 = bit(hits, 60) + node T_4289 = bit(hits, 61) + node T_4291 = shl(isJump[0], 0) + node T_4292 = mux(T_4228, T_4291, UInt<1>("h00")) + node T_4294 = shl(isJump[1], 0) + node T_4295 = mux(T_4229, T_4294, UInt<1>("h00")) + node T_4297 = shl(isJump[2], 0) + node T_4298 = mux(T_4230, T_4297, UInt<1>("h00")) + node T_4300 = shl(isJump[3], 0) + node T_4301 = mux(T_4231, T_4300, UInt<1>("h00")) + node T_4303 = shl(isJump[4], 0) + node T_4304 = mux(T_4232, T_4303, UInt<1>("h00")) + node T_4306 = shl(isJump[5], 0) + node T_4307 = mux(T_4233, T_4306, UInt<1>("h00")) + node T_4309 = shl(isJump[6], 0) + node T_4310 = mux(T_4234, T_4309, UInt<1>("h00")) + node T_4312 = shl(isJump[7], 0) + node T_4313 = mux(T_4235, T_4312, UInt<1>("h00")) + node T_4315 = shl(isJump[8], 0) + node T_4316 = mux(T_4236, T_4315, UInt<1>("h00")) + node T_4318 = shl(isJump[9], 0) + node T_4319 = mux(T_4237, T_4318, UInt<1>("h00")) + node T_4321 = shl(isJump[10], 0) + node T_4322 = mux(T_4238, T_4321, UInt<1>("h00")) + node T_4324 = shl(isJump[11], 0) + node T_4325 = mux(T_4239, T_4324, UInt<1>("h00")) + node T_4327 = shl(isJump[12], 0) + node T_4328 = mux(T_4240, T_4327, UInt<1>("h00")) + node T_4330 = shl(isJump[13], 0) + node T_4331 = mux(T_4241, T_4330, UInt<1>("h00")) + node T_4333 = shl(isJump[14], 0) + node T_4334 = mux(T_4242, T_4333, UInt<1>("h00")) + node T_4336 = shl(isJump[15], 0) + node T_4337 = mux(T_4243, T_4336, UInt<1>("h00")) + node T_4339 = shl(isJump[16], 0) + node T_4340 = mux(T_4244, T_4339, UInt<1>("h00")) + node T_4342 = shl(isJump[17], 0) + node T_4343 = mux(T_4245, T_4342, UInt<1>("h00")) + node T_4345 = shl(isJump[18], 0) + node T_4346 = mux(T_4246, T_4345, UInt<1>("h00")) + node T_4348 = shl(isJump[19], 0) + node T_4349 = mux(T_4247, T_4348, UInt<1>("h00")) + node T_4351 = shl(isJump[20], 0) + node T_4352 = mux(T_4248, T_4351, UInt<1>("h00")) + node T_4354 = shl(isJump[21], 0) + node T_4355 = mux(T_4249, T_4354, UInt<1>("h00")) + node T_4357 = shl(isJump[22], 0) + node T_4358 = mux(T_4250, T_4357, UInt<1>("h00")) + node T_4360 = shl(isJump[23], 0) + node T_4361 = mux(T_4251, T_4360, UInt<1>("h00")) + node T_4363 = shl(isJump[24], 0) + node T_4364 = mux(T_4252, T_4363, UInt<1>("h00")) + node T_4366 = shl(isJump[25], 0) + node T_4367 = mux(T_4253, T_4366, UInt<1>("h00")) + node T_4369 = shl(isJump[26], 0) + node T_4370 = mux(T_4254, T_4369, UInt<1>("h00")) + node T_4372 = shl(isJump[27], 0) + node T_4373 = mux(T_4255, T_4372, UInt<1>("h00")) + node T_4375 = shl(isJump[28], 0) + node T_4376 = mux(T_4256, T_4375, UInt<1>("h00")) + node T_4378 = shl(isJump[29], 0) + node T_4379 = mux(T_4257, T_4378, UInt<1>("h00")) + node T_4381 = shl(isJump[30], 0) + node T_4382 = mux(T_4258, T_4381, UInt<1>("h00")) + node T_4384 = shl(isJump[31], 0) + node T_4385 = mux(T_4259, T_4384, UInt<1>("h00")) + node T_4387 = shl(isJump[32], 0) + node T_4388 = mux(T_4260, T_4387, UInt<1>("h00")) + node T_4390 = shl(isJump[33], 0) + node T_4391 = mux(T_4261, T_4390, UInt<1>("h00")) + node T_4393 = shl(isJump[34], 0) + node T_4394 = mux(T_4262, T_4393, UInt<1>("h00")) + node T_4396 = shl(isJump[35], 0) + node T_4397 = mux(T_4263, T_4396, UInt<1>("h00")) + node T_4399 = shl(isJump[36], 0) + node T_4400 = mux(T_4264, T_4399, UInt<1>("h00")) + node T_4402 = shl(isJump[37], 0) + node T_4403 = mux(T_4265, T_4402, UInt<1>("h00")) + node T_4405 = shl(isJump[38], 0) + node T_4406 = mux(T_4266, T_4405, UInt<1>("h00")) + node T_4408 = shl(isJump[39], 0) + node T_4409 = mux(T_4267, T_4408, UInt<1>("h00")) + node T_4411 = shl(isJump[40], 0) + node T_4412 = mux(T_4268, T_4411, UInt<1>("h00")) + node T_4414 = shl(isJump[41], 0) + node T_4415 = mux(T_4269, T_4414, UInt<1>("h00")) + node T_4417 = shl(isJump[42], 0) + node T_4418 = mux(T_4270, T_4417, UInt<1>("h00")) + node T_4420 = shl(isJump[43], 0) + node T_4421 = mux(T_4271, T_4420, UInt<1>("h00")) + node T_4423 = shl(isJump[44], 0) + node T_4424 = mux(T_4272, T_4423, UInt<1>("h00")) + node T_4426 = shl(isJump[45], 0) + node T_4427 = mux(T_4273, T_4426, UInt<1>("h00")) + node T_4429 = shl(isJump[46], 0) + node T_4430 = mux(T_4274, T_4429, UInt<1>("h00")) + node T_4432 = shl(isJump[47], 0) + node T_4433 = mux(T_4275, T_4432, UInt<1>("h00")) + node T_4435 = shl(isJump[48], 0) + node T_4436 = mux(T_4276, T_4435, UInt<1>("h00")) + node T_4438 = shl(isJump[49], 0) + node T_4439 = mux(T_4277, T_4438, UInt<1>("h00")) + node T_4441 = shl(isJump[50], 0) + node T_4442 = mux(T_4278, T_4441, UInt<1>("h00")) + node T_4444 = shl(isJump[51], 0) + node T_4445 = mux(T_4279, T_4444, UInt<1>("h00")) + node T_4447 = shl(isJump[52], 0) + node T_4448 = mux(T_4280, T_4447, UInt<1>("h00")) + node T_4450 = shl(isJump[53], 0) + node T_4451 = mux(T_4281, T_4450, UInt<1>("h00")) + node T_4453 = shl(isJump[54], 0) + node T_4454 = mux(T_4282, T_4453, UInt<1>("h00")) + node T_4456 = shl(isJump[55], 0) + node T_4457 = mux(T_4283, T_4456, UInt<1>("h00")) + node T_4459 = shl(isJump[56], 0) + node T_4460 = mux(T_4284, T_4459, UInt<1>("h00")) + node T_4462 = shl(isJump[57], 0) + node T_4463 = mux(T_4285, T_4462, UInt<1>("h00")) + node T_4465 = shl(isJump[58], 0) + node T_4466 = mux(T_4286, T_4465, UInt<1>("h00")) + node T_4468 = shl(isJump[59], 0) + node T_4469 = mux(T_4287, T_4468, UInt<1>("h00")) + node T_4471 = shl(isJump[60], 0) + node T_4472 = mux(T_4288, T_4471, UInt<1>("h00")) + node T_4474 = shl(isJump[61], 0) + node T_4475 = mux(T_4289, T_4474, UInt<1>("h00")) + node T_4477 = or(T_4292, T_4295) + node T_4478 = or(T_4477, T_4298) + node T_4479 = or(T_4478, T_4301) + node T_4480 = or(T_4479, T_4304) + node T_4481 = or(T_4480, T_4307) + node T_4482 = or(T_4481, T_4310) + node T_4483 = or(T_4482, T_4313) + node T_4484 = or(T_4483, T_4316) + node T_4485 = or(T_4484, T_4319) + node T_4486 = or(T_4485, T_4322) + node T_4487 = or(T_4486, T_4325) + node T_4488 = or(T_4487, T_4328) + node T_4489 = or(T_4488, T_4331) + node T_4490 = or(T_4489, T_4334) + node T_4491 = or(T_4490, T_4337) + node T_4492 = or(T_4491, T_4340) + node T_4493 = or(T_4492, T_4343) + node T_4494 = or(T_4493, T_4346) + node T_4495 = or(T_4494, T_4349) + node T_4496 = or(T_4495, T_4352) + node T_4497 = or(T_4496, T_4355) + node T_4498 = or(T_4497, T_4358) + node T_4499 = or(T_4498, T_4361) + node T_4500 = or(T_4499, T_4364) + node T_4501 = or(T_4500, T_4367) + node T_4502 = or(T_4501, T_4370) + node T_4503 = or(T_4502, T_4373) + node T_4504 = or(T_4503, T_4376) + node T_4505 = or(T_4504, T_4379) + node T_4506 = or(T_4505, T_4382) + node T_4507 = or(T_4506, T_4385) + node T_4508 = or(T_4507, T_4388) + node T_4509 = or(T_4508, T_4391) + node T_4510 = or(T_4509, T_4394) + node T_4511 = or(T_4510, T_4397) + node T_4512 = or(T_4511, T_4400) + node T_4513 = or(T_4512, T_4403) + node T_4514 = or(T_4513, T_4406) + node T_4515 = or(T_4514, T_4409) + node T_4516 = or(T_4515, T_4412) + node T_4517 = or(T_4516, T_4415) + node T_4518 = or(T_4517, T_4418) + node T_4519 = or(T_4518, T_4421) + node T_4520 = or(T_4519, T_4424) + node T_4521 = or(T_4520, T_4427) + node T_4522 = or(T_4521, T_4430) + node T_4523 = or(T_4522, T_4433) + node T_4524 = or(T_4523, T_4436) + node T_4525 = or(T_4524, T_4439) + node T_4526 = or(T_4525, T_4442) + node T_4527 = or(T_4526, T_4445) + node T_4528 = or(T_4527, T_4448) + node T_4529 = or(T_4528, T_4451) + node T_4530 = or(T_4529, T_4454) + node T_4531 = or(T_4530, T_4457) + node T_4532 = or(T_4531, T_4460) + node T_4533 = or(T_4532, T_4463) + node T_4534 = or(T_4533, T_4466) + node T_4535 = or(T_4534, T_4469) + node T_4536 = or(T_4535, T_4472) + node T_4537 = or(T_4536, T_4475) + wire T_4538 : UInt<1> + T_4538 := UInt<1>("h00") + T_4538 := T_4537 + node T_4541 = eq(T_4538, UInt<1>("h00")) + node T_4542 = and(req.valid, resp.valid) + node T_4543 = and(T_4542, T_4541) + wire T_4547 : {history : UInt<7>, value : UInt<2>} + T_4547.value := UInt<1>("h00") + T_4547.history := UInt<1>("h00") + node T_4552 = bits(req.bits.addr, 8, 2) + node T_4553 = xor(T_4552, T_4227) + infer accessor T_4554 = T_4225[T_4553] + T_4547.value := T_4554 + T_4547.history := T_4227 + node T_4555 = bit(T_4547.value, 0) + when T_4543 : + node T_4556 = bits(T_4227, 6, 1) + node T_4557 = cat(T_4555, T_4556) + T_4227 := T_4557 + skip + node T_4558 = and(bht_update.valid, bht_update.bits.prediction.valid) + when T_4558 : + node T_4559 = bits(bht_update.bits.pc, 8, 2) + node T_4560 = xor(T_4559, bht_update.bits.prediction.bits.bht.history) + infer accessor T_4561 = T_4225[T_4560] + node T_4562 = bit(bht_update.bits.prediction.bits.bht.value, 1) + node T_4563 = bit(bht_update.bits.prediction.bits.bht.value, 0) + node T_4564 = and(T_4562, T_4563) + node T_4565 = bit(bht_update.bits.prediction.bits.bht.value, 1) + node T_4566 = bit(bht_update.bits.prediction.bits.bht.value, 0) + node T_4567 = or(T_4565, T_4566) + node T_4568 = and(T_4567, bht_update.bits.taken) + node T_4569 = or(T_4564, T_4568) + node T_4570 = cat(bht_update.bits.taken, T_4569) + T_4561 := T_4570 + when bht_update.bits.mispredict : + node T_4571 = bits(bht_update.bits.prediction.bits.bht.history, 6, 1) + node T_4572 = cat(bht_update.bits.taken, T_4571) + T_4227 := T_4572 + skip + skip + node T_4573 = bit(T_4547.value, 0) + node T_4575 = eq(T_4573, UInt<1>("h00")) + node T_4576 = and(T_4575, T_4541) + when T_4576 : + resp.bits.taken := UInt<1>("h00") + skip + resp.bits.bht <> T_4547 + reg T_4579 : UInt<2>, clock, reset + onreset T_4579 := UInt<2>("h00") + reg T_4581 : UInt<1>, clock, reset + onreset T_4581 := UInt<1>("h00") + reg T_4590 : UInt<1>[2], clock, reset + node T_4594 = bit(hits, 0) + node T_4595 = bit(hits, 1) + node T_4596 = bit(hits, 2) + node T_4597 = bit(hits, 3) + node T_4598 = bit(hits, 4) + node T_4599 = bit(hits, 5) + node T_4600 = bit(hits, 6) + node T_4601 = bit(hits, 7) + node T_4602 = bit(hits, 8) + node T_4603 = bit(hits, 9) + node T_4604 = bit(hits, 10) + node T_4605 = bit(hits, 11) + node T_4606 = bit(hits, 12) + node T_4607 = bit(hits, 13) + node T_4608 = bit(hits, 14) + node T_4609 = bit(hits, 15) + node T_4610 = bit(hits, 16) + node T_4611 = bit(hits, 17) + node T_4612 = bit(hits, 18) + node T_4613 = bit(hits, 19) + node T_4614 = bit(hits, 20) + node T_4615 = bit(hits, 21) + node T_4616 = bit(hits, 22) + node T_4617 = bit(hits, 23) + node T_4618 = bit(hits, 24) + node T_4619 = bit(hits, 25) + node T_4620 = bit(hits, 26) + node T_4621 = bit(hits, 27) + node T_4622 = bit(hits, 28) + node T_4623 = bit(hits, 29) + node T_4624 = bit(hits, 30) + node T_4625 = bit(hits, 31) + node T_4626 = bit(hits, 32) + node T_4627 = bit(hits, 33) + node T_4628 = bit(hits, 34) + node T_4629 = bit(hits, 35) + node T_4630 = bit(hits, 36) + node T_4631 = bit(hits, 37) + node T_4632 = bit(hits, 38) + node T_4633 = bit(hits, 39) + node T_4634 = bit(hits, 40) + node T_4635 = bit(hits, 41) + node T_4636 = bit(hits, 42) + node T_4637 = bit(hits, 43) + node T_4638 = bit(hits, 44) + node T_4639 = bit(hits, 45) + node T_4640 = bit(hits, 46) + node T_4641 = bit(hits, 47) + node T_4642 = bit(hits, 48) + node T_4643 = bit(hits, 49) + node T_4644 = bit(hits, 50) + node T_4645 = bit(hits, 51) + node T_4646 = bit(hits, 52) + node T_4647 = bit(hits, 53) + node T_4648 = bit(hits, 54) + node T_4649 = bit(hits, 55) + node T_4650 = bit(hits, 56) + node T_4651 = bit(hits, 57) + node T_4652 = bit(hits, 58) + node T_4653 = bit(hits, 59) + node T_4654 = bit(hits, 60) + node T_4655 = bit(hits, 61) + node T_4657 = shl(useRAS[0], 0) + node T_4658 = mux(T_4594, T_4657, UInt<1>("h00")) + node T_4660 = shl(useRAS[1], 0) + node T_4661 = mux(T_4595, T_4660, UInt<1>("h00")) + node T_4663 = shl(useRAS[2], 0) + node T_4664 = mux(T_4596, T_4663, UInt<1>("h00")) + node T_4666 = shl(useRAS[3], 0) + node T_4667 = mux(T_4597, T_4666, UInt<1>("h00")) + node T_4669 = shl(useRAS[4], 0) + node T_4670 = mux(T_4598, T_4669, UInt<1>("h00")) + node T_4672 = shl(useRAS[5], 0) + node T_4673 = mux(T_4599, T_4672, UInt<1>("h00")) + node T_4675 = shl(useRAS[6], 0) + node T_4676 = mux(T_4600, T_4675, UInt<1>("h00")) + node T_4678 = shl(useRAS[7], 0) + node T_4679 = mux(T_4601, T_4678, UInt<1>("h00")) + node T_4681 = shl(useRAS[8], 0) + node T_4682 = mux(T_4602, T_4681, UInt<1>("h00")) + node T_4684 = shl(useRAS[9], 0) + node T_4685 = mux(T_4603, T_4684, UInt<1>("h00")) + node T_4687 = shl(useRAS[10], 0) + node T_4688 = mux(T_4604, T_4687, UInt<1>("h00")) + node T_4690 = shl(useRAS[11], 0) + node T_4691 = mux(T_4605, T_4690, UInt<1>("h00")) + node T_4693 = shl(useRAS[12], 0) + node T_4694 = mux(T_4606, T_4693, UInt<1>("h00")) + node T_4696 = shl(useRAS[13], 0) + node T_4697 = mux(T_4607, T_4696, UInt<1>("h00")) + node T_4699 = shl(useRAS[14], 0) + node T_4700 = mux(T_4608, T_4699, UInt<1>("h00")) + node T_4702 = shl(useRAS[15], 0) + node T_4703 = mux(T_4609, T_4702, UInt<1>("h00")) + node T_4705 = shl(useRAS[16], 0) + node T_4706 = mux(T_4610, T_4705, UInt<1>("h00")) + node T_4708 = shl(useRAS[17], 0) + node T_4709 = mux(T_4611, T_4708, UInt<1>("h00")) + node T_4711 = shl(useRAS[18], 0) + node T_4712 = mux(T_4612, T_4711, UInt<1>("h00")) + node T_4714 = shl(useRAS[19], 0) + node T_4715 = mux(T_4613, T_4714, UInt<1>("h00")) + node T_4717 = shl(useRAS[20], 0) + node T_4718 = mux(T_4614, T_4717, UInt<1>("h00")) + node T_4720 = shl(useRAS[21], 0) + node T_4721 = mux(T_4615, T_4720, UInt<1>("h00")) + node T_4723 = shl(useRAS[22], 0) + node T_4724 = mux(T_4616, T_4723, UInt<1>("h00")) + node T_4726 = shl(useRAS[23], 0) + node T_4727 = mux(T_4617, T_4726, UInt<1>("h00")) + node T_4729 = shl(useRAS[24], 0) + node T_4730 = mux(T_4618, T_4729, UInt<1>("h00")) + node T_4732 = shl(useRAS[25], 0) + node T_4733 = mux(T_4619, T_4732, UInt<1>("h00")) + node T_4735 = shl(useRAS[26], 0) + node T_4736 = mux(T_4620, T_4735, UInt<1>("h00")) + node T_4738 = shl(useRAS[27], 0) + node T_4739 = mux(T_4621, T_4738, UInt<1>("h00")) + node T_4741 = shl(useRAS[28], 0) + node T_4742 = mux(T_4622, T_4741, UInt<1>("h00")) + node T_4744 = shl(useRAS[29], 0) + node T_4745 = mux(T_4623, T_4744, UInt<1>("h00")) + node T_4747 = shl(useRAS[30], 0) + node T_4748 = mux(T_4624, T_4747, UInt<1>("h00")) + node T_4750 = shl(useRAS[31], 0) + node T_4751 = mux(T_4625, T_4750, UInt<1>("h00")) + node T_4753 = shl(useRAS[32], 0) + node T_4754 = mux(T_4626, T_4753, UInt<1>("h00")) + node T_4756 = shl(useRAS[33], 0) + node T_4757 = mux(T_4627, T_4756, UInt<1>("h00")) + node T_4759 = shl(useRAS[34], 0) + node T_4760 = mux(T_4628, T_4759, UInt<1>("h00")) + node T_4762 = shl(useRAS[35], 0) + node T_4763 = mux(T_4629, T_4762, UInt<1>("h00")) + node T_4765 = shl(useRAS[36], 0) + node T_4766 = mux(T_4630, T_4765, UInt<1>("h00")) + node T_4768 = shl(useRAS[37], 0) + node T_4769 = mux(T_4631, T_4768, UInt<1>("h00")) + node T_4771 = shl(useRAS[38], 0) + node T_4772 = mux(T_4632, T_4771, UInt<1>("h00")) + node T_4774 = shl(useRAS[39], 0) + node T_4775 = mux(T_4633, T_4774, UInt<1>("h00")) + node T_4777 = shl(useRAS[40], 0) + node T_4778 = mux(T_4634, T_4777, UInt<1>("h00")) + node T_4780 = shl(useRAS[41], 0) + node T_4781 = mux(T_4635, T_4780, UInt<1>("h00")) + node T_4783 = shl(useRAS[42], 0) + node T_4784 = mux(T_4636, T_4783, UInt<1>("h00")) + node T_4786 = shl(useRAS[43], 0) + node T_4787 = mux(T_4637, T_4786, UInt<1>("h00")) + node T_4789 = shl(useRAS[44], 0) + node T_4790 = mux(T_4638, T_4789, UInt<1>("h00")) + node T_4792 = shl(useRAS[45], 0) + node T_4793 = mux(T_4639, T_4792, UInt<1>("h00")) + node T_4795 = shl(useRAS[46], 0) + node T_4796 = mux(T_4640, T_4795, UInt<1>("h00")) + node T_4798 = shl(useRAS[47], 0) + node T_4799 = mux(T_4641, T_4798, UInt<1>("h00")) + node T_4801 = shl(useRAS[48], 0) + node T_4802 = mux(T_4642, T_4801, UInt<1>("h00")) + node T_4804 = shl(useRAS[49], 0) + node T_4805 = mux(T_4643, T_4804, UInt<1>("h00")) + node T_4807 = shl(useRAS[50], 0) + node T_4808 = mux(T_4644, T_4807, UInt<1>("h00")) + node T_4810 = shl(useRAS[51], 0) + node T_4811 = mux(T_4645, T_4810, UInt<1>("h00")) + node T_4813 = shl(useRAS[52], 0) + node T_4814 = mux(T_4646, T_4813, UInt<1>("h00")) + node T_4816 = shl(useRAS[53], 0) + node T_4817 = mux(T_4647, T_4816, UInt<1>("h00")) + node T_4819 = shl(useRAS[54], 0) + node T_4820 = mux(T_4648, T_4819, UInt<1>("h00")) + node T_4822 = shl(useRAS[55], 0) + node T_4823 = mux(T_4649, T_4822, UInt<1>("h00")) + node T_4825 = shl(useRAS[56], 0) + node T_4826 = mux(T_4650, T_4825, UInt<1>("h00")) + node T_4828 = shl(useRAS[57], 0) + node T_4829 = mux(T_4651, T_4828, UInt<1>("h00")) + node T_4831 = shl(useRAS[58], 0) + node T_4832 = mux(T_4652, T_4831, UInt<1>("h00")) + node T_4834 = shl(useRAS[59], 0) + node T_4835 = mux(T_4653, T_4834, UInt<1>("h00")) + node T_4837 = shl(useRAS[60], 0) + node T_4838 = mux(T_4654, T_4837, UInt<1>("h00")) + node T_4840 = shl(useRAS[61], 0) + node T_4841 = mux(T_4655, T_4840, UInt<1>("h00")) + node T_4843 = or(T_4658, T_4661) + node T_4844 = or(T_4843, T_4664) + node T_4845 = or(T_4844, T_4667) + node T_4846 = or(T_4845, T_4670) + node T_4847 = or(T_4846, T_4673) + node T_4848 = or(T_4847, T_4676) + node T_4849 = or(T_4848, T_4679) + node T_4850 = or(T_4849, T_4682) + node T_4851 = or(T_4850, T_4685) + node T_4852 = or(T_4851, T_4688) + node T_4853 = or(T_4852, T_4691) + node T_4854 = or(T_4853, T_4694) + node T_4855 = or(T_4854, T_4697) + node T_4856 = or(T_4855, T_4700) + node T_4857 = or(T_4856, T_4703) + node T_4858 = or(T_4857, T_4706) + node T_4859 = or(T_4858, T_4709) + node T_4860 = or(T_4859, T_4712) + node T_4861 = or(T_4860, T_4715) + node T_4862 = or(T_4861, T_4718) + node T_4863 = or(T_4862, T_4721) + node T_4864 = or(T_4863, T_4724) + node T_4865 = or(T_4864, T_4727) + node T_4866 = or(T_4865, T_4730) + node T_4867 = or(T_4866, T_4733) + node T_4868 = or(T_4867, T_4736) + node T_4869 = or(T_4868, T_4739) + node T_4870 = or(T_4869, T_4742) + node T_4871 = or(T_4870, T_4745) + node T_4872 = or(T_4871, T_4748) + node T_4873 = or(T_4872, T_4751) + node T_4874 = or(T_4873, T_4754) + node T_4875 = or(T_4874, T_4757) + node T_4876 = or(T_4875, T_4760) + node T_4877 = or(T_4876, T_4763) + node T_4878 = or(T_4877, T_4766) + node T_4879 = or(T_4878, T_4769) + node T_4880 = or(T_4879, T_4772) + node T_4881 = or(T_4880, T_4775) + node T_4882 = or(T_4881, T_4778) + node T_4883 = or(T_4882, T_4781) + node T_4884 = or(T_4883, T_4784) + node T_4885 = or(T_4884, T_4787) + node T_4886 = or(T_4885, T_4790) + node T_4887 = or(T_4886, T_4793) + node T_4888 = or(T_4887, T_4796) + node T_4889 = or(T_4888, T_4799) + node T_4890 = or(T_4889, T_4802) + node T_4891 = or(T_4890, T_4805) + node T_4892 = or(T_4891, T_4808) + node T_4893 = or(T_4892, T_4811) + node T_4894 = or(T_4893, T_4814) + node T_4895 = or(T_4894, T_4817) + node T_4896 = or(T_4895, T_4820) + node T_4897 = or(T_4896, T_4823) + node T_4898 = or(T_4897, T_4826) + node T_4899 = or(T_4898, T_4829) + node T_4900 = or(T_4899, T_4832) + node T_4901 = or(T_4900, T_4835) + node T_4902 = or(T_4901, T_4838) + node T_4903 = or(T_4902, T_4841) + wire T_4904 : UInt<1> + T_4904 := UInt<1>("h00") + T_4904 := T_4903 + node T_4907 = eq(T_4579, UInt<1>("h00")) + node T_4909 = eq(T_4907, UInt<1>("h00")) + node T_4910 = and(T_4909, T_4904) + when T_4910 : + infer accessor T_4911 = T_4590[T_4581] + resp.bits.target := T_4911 + skip + when ras_update.valid : + when ras_update.bits.isCall : + node T_4913 = lt(T_4579, UInt<2>("h02")) + when T_4913 : + node T_4915 = addw(T_4579, UInt<1>("h01")) + T_4579 := T_4915 + skip + node T_4918 = lt(T_4581, UInt<1>("h01")) + node T_4919 = or(UInt<1>("h01"), T_4918) + node T_4921 = addw(T_4581, UInt<1>("h01")) + node T_4923 = mux(T_4919, T_4921, UInt<1>("h00")) + infer accessor T_4924 = T_4590[T_4923] + T_4924 := ras_update.bits.returnAddr + T_4581 := T_4923 + when T_4904 : + resp.bits.target := ras_update.bits.returnAddr + skip + skip + else : + node T_4925 = and(ras_update.bits.isReturn, ras_update.bits.prediction.valid) + when T_4925 : + node T_4927 = eq(T_4579, UInt<1>("h00")) + node T_4929 = eq(T_4927, UInt<1>("h00")) + when T_4929 : + node T_4931 = subw(T_4579, UInt<1>("h01")) + T_4579 := T_4931 + node T_4934 = gt(T_4581, UInt<1>("h00")) + node T_4935 = or(UInt<1>("h01"), T_4934) + node T_4937 = subw(T_4581, UInt<1>("h01")) + node T_4939 = mux(T_4935, T_4937, UInt<1>("h01")) + T_4581 := T_4939 + skip + skip + skip + skip + when invalidate : + T_4579 := UInt<1>("h00") + skip +;CHECK: Done! |