Fixed inability to disable combo loop check (#619)

* Fixed inability to disable combo loop check
Moved checking of dontCheckComboLoops into loadAnnotations so
that it works in cases where Driver.execute is not used.

* Fix test for annotations, modifications to loadAnnotations
made 2 more annotations visible.

* Remove debug println from DriverSpec

2 files changed, 37 insertions, 34 deletions

diff --git a/src/main/scala/firrtl/Driver.scala b/src/main/scala/firrtl/Driver.scala
index 264ba44c..1f0741fd 100644
--- a/src/main/scala/firrtl/Driver.scala
+++ b/src/main/scala/firrtl/Driver.scala
@@ -113,6 +113,17 @@ object Driver {
       optionsManager.firrtlOptions = optionsManager.firrtlOptions.copy(
         annotations = firrtlConfig.annotations ++ targetDirAnno)
     }
+
+    // Output Annotations
+    val outputAnnos = firrtlConfig.getEmitterAnnos(optionsManager)
+
+    val globalAnnos = Seq(TargetDirAnnotation(optionsManager.targetDirName)) ++
+      (if (firrtlConfig.dontCheckCombLoops) Seq(DontCheckCombLoopsAnnotation()) else Seq()) ++
+      (if (firrtlConfig.noDCE) Seq(NoDCEAnnotation()) else Seq())
+
+    optionsManager.firrtlOptions = optionsManager.firrtlOptions.copy(
+      annotations = firrtlConfig.annotations ++ outputAnnos ++ globalAnnos)
+
   }
 
   /**
@@ -162,42 +173,34 @@ object Driver {
       // Does this need to be before calling compiler?
       optionsManager.makeTargetDir()
 
-      // Output Annotations
-      val outputAnnos = firrtlConfig.getEmitterAnnos(optionsManager)
+      val finalState = firrtlConfig.compiler.compile(
+        CircuitState(parsedInput,
+                     ChirrtlForm,
+                     Some(AnnotationMap(firrtlConfig.annotations))),
+        firrtlConfig.customTransforms
+      )
 
-    // Should these and outputAnnos be moved to loadAnnotations?
-    val globalAnnos = Seq(TargetDirAnnotation(optionsManager.targetDirName)) ++
-      (if (firrtlConfig.dontCheckCombLoops) Seq(DontCheckCombLoopsAnnotation()) else Seq()) ++
-      (if (firrtlConfig.noDCE) Seq(NoDCEAnnotation()) else Seq())
-
-    val finalState = firrtlConfig.compiler.compile(
-      CircuitState(parsedInput,
-                   ChirrtlForm,
-                   Some(AnnotationMap(firrtlConfig.annotations ++ outputAnnos ++ globalAnnos))),
-      firrtlConfig.customTransforms
-    )
-
-    // Do emission
-    // Note: Single emission target assumption is baked in here
-    // Note: FirrtlExecutionSuccess emitted is only used if we're emitting the whole Circuit
-    val emittedRes = firrtlConfig.getOutputConfig(optionsManager) match {
-      case SingleFile(filename) =>
-        val emitted = finalState.getEmittedCircuit
-        val outputFile = new java.io.PrintWriter(filename)
-        outputFile.write(emitted.value)
-        outputFile.close()
-        emitted.value
-      case OneFilePerModule(dirName) =>
-        val emittedModules = finalState.emittedComponents collect { case x: EmittedModule => x }
-        if (emittedModules.isEmpty) throwInternalError // There should be something
-        emittedModules.foreach { case module =>
-          val filename = optionsManager.getBuildFileName(firrtlConfig.outputSuffix, s"$dirName/${module.name}")
+      // Do emission
+      // Note: Single emission target assumption is baked in here
+      // Note: FirrtlExecutionSuccess emitted is only used if we're emitting the whole Circuit
+      val emittedRes = firrtlConfig.getOutputConfig(optionsManager) match {
+        case SingleFile(filename) =>
+          val emitted = finalState.getEmittedCircuit
           val outputFile = new java.io.PrintWriter(filename)
-          outputFile.write(module.value)
+          outputFile.write(emitted.value)
           outputFile.close()
-        }
-        "" // Should we return something different here?
-    }
+          emitted.value
+        case OneFilePerModule(dirName) =>
+          val emittedModules = finalState.emittedComponents collect { case x: EmittedModule => x }
+          if (emittedModules.isEmpty) throwInternalError // There should be something
+          emittedModules.foreach { case module =>
+            val filename = optionsManager.getBuildFileName(firrtlConfig.outputSuffix, s"$dirName/${module.name}")
+            val outputFile = new java.io.PrintWriter(filename)
+            outputFile.write(module.value)
+            outputFile.close()
+          }
+          "" // Should we return something different here?
+      }
 
       FirrtlExecutionSuccess(firrtlConfig.compilerName, emittedRes)
     }
diff --git a/src/test/scala/firrtlTests/DriverSpec.scala b/src/test/scala/firrtlTests/DriverSpec.scala
index 377353dc..e3164f89 100644
--- a/src/test/scala/firrtlTests/DriverSpec.scala
+++ b/src/test/scala/firrtlTests/DriverSpec.scala
@@ -137,7 +137,7 @@ class DriverSpec extends FreeSpec with Matchers with BackendCompilationUtilities
     copyResourceToFile("/annotations/SampleAnnotations.anno", annotationsTestFile)
     optionsManager.firrtlOptions.annotations.length should be (0)
     Driver.loadAnnotations(optionsManager)
-    optionsManager.firrtlOptions.annotations.length should be (10) // 9 from circuit plus 1 for targetDir
+    optionsManager.firrtlOptions.annotations.length should be (12) // 9 from circuit plus 3 general purpose
 
     optionsManager.firrtlOptions.annotations.head.transformClass should be ("firrtl.passes.InlineInstances")
     annotationsTestFile.delete()