sail - Formal specification language for ISAs

Age	Commit message (Expand)	Author
2016-07-26	Fix incomplete match warning in run_with*	Robert Norton
2016-07-26	Increase size of TLB to 64 entries. In theory this should improve FreeBSD boo...	Robert Norton
2016-07-26	Add minimal support for emulated Altera JTAG UART.	Robert Norton
2016-07-26	Add support for loading a raw binary file at given location in memory prior t...	Robert Norton
2016-05-25	add support for capability load/store bits in TLB	Robert Norton
2016-05-20	Add missing CP0BadVaddr in run_with_elfs.	Robert Norton
2016-05-18	Implement 8-entry software-managed TLB.	Robert Norton
2016-05-12	Implement count/compare registers for timer interrupts and rdhwr instruction.	Robert Norton
2016-05-10	Initialise CP0Status BEV bit.	Robert Norton
2016-05-09	Reverse the list of events to respect their order	Kathy Gray
2016-05-06	rewrite fde_loop to make it easier to understand and fix some tests. still re...	Robert Norton
2016-05-05	Factor out get_opcode	Robert Norton
2016-05-03	List registers required to handle exception during instruction fetch. Attempt...	Robert Norton
2016-05-03	actually read next_pc twice when handling a translate_address exception	Kathy Gray
2016-05-03	write all or part of fields out of translate_address (instead of just all)	Kathy Gray
2016-05-03	Change decode and translate_address to support writing register events (altho...	Kathy Gray
2016-04-27	slightly simplify set_next_instruction_address -- no need to read convert the...	Robert Norton
2016-04-27	cheri: add translation and bounds checking of PC via PCC. Slightly clunky imp...	Robert Norton
2016-04-25	Make interpreter able to read registers during translate address and decode.	Kathy Gray
2016-04-19	cheri: zero all tags when loading memory from elf so that we don't get undefi...	Robert Norton
2016-04-13	Copy run_with_elf to make run_with_elf_cheri and revert run_with_elf to mips ...	Robert Norton