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path: root/src/lem_interp/run_with_elf_cheri.ml
AgeCommit message (Expand)Author
2017-12-30use linksem as a packageShaked Flur
2017-12-05Update header files on masterAlasdair Armstrong
2017-11-02remove a lot of dead code form run_with_elf_cheri*Robert Norton
2017-11-02reset inCCallDelay in code that is not dead.Robert Norton
2017-10-31cheri: throw an exception if there is an attempt to access C26/IDC in the del...Robert Norton
2017-09-29fix those build errorsChristopher Pulte
2017-08-02fix run_with_elf*.ml with changed lem_interp apiJon French
2017-05-26fix run_with builds after build_context gained an extra argument.Robert Norton
2017-05-24Change types of MEMr_tag, MEMval_tag and co. so that tag is separate from dat...Robert Norton
2017-04-03Rename TranslateAddress to TranslatePC and remove the accessType argument -- ...Robert Norton
2017-03-29change reqiured to work with little endian interpreter.Robert Norton
2017-02-03fix headersPeter Sewell
2016-12-02fix interpreter build following refactoringRobert Norton
2016-10-25load all segments into prog_mem regardless of x flag (for running cheri tests...Robert Norton
2016-10-22fixes following interface changes (type of instruction, name of barrier)Robert Norton
2016-10-11Update run_with_elf* for new linksem sail_interfaceRobert Norton
2016-10-11Update to use sail_impl_base.Robert Norton
2016-09-14Switch mips/cheri over to using memory ea/val for writes. Tag is now first by...Robert Norton
2016-07-26Fix incomplete match warning in run_with*Robert Norton
2016-07-26Increase size of TLB to 64 entries. In theory this should improve FreeBSD boo...Robert Norton
2016-07-26Add minimal support for emulated Altera JTAG UART.Robert Norton
2016-07-26Add support for loading a raw binary file at given location in memory prior t...Robert Norton
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-20Add missing CP0BadVaddr in run_with_elfs.Robert Norton
2016-05-18Implement 8-entry software-managed TLB.Robert Norton
2016-05-12Implement count/compare registers for timer interrupts and rdhwr instruction.Robert Norton
2016-05-10Initialise CP0Status BEV bit.Robert Norton
2016-05-09Reverse the list of events to respect their orderKathy Gray
2016-05-06rewrite fde_loop to make it easier to understand and fix some tests. still re...Robert Norton
2016-05-05Factor out get_opcodeRobert Norton
2016-05-03List registers required to handle exception during instruction fetch. Attempt...Robert Norton
2016-05-03actually read next_pc twice when handling a translate_address exceptionKathy Gray
2016-05-03write all or part of fields out of translate_address (instead of just all)Kathy Gray
2016-05-03Change decode and translate_address to support writing register events (altho...Kathy Gray
2016-04-27slightly simplify set_next_instruction_address -- no need to read convert the...Robert Norton
2016-04-27cheri: add translation and bounds checking of PC via PCC. Slightly clunky imp...Robert Norton
2016-04-25Make interpreter able to read registers during translate address and decode.Kathy Gray
2016-04-19cheri: zero all tags when loading memory from elf so that we don't get undefi...Robert Norton
2016-04-13Copy run_with_elf to make run_with_elf_cheri and revert run_with_elf to mips ...Robert Norton
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