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Formal specification language for ISAs
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riscv_platform.sail
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Author
2018-12-20
RISVC model is now at https://github.com/rems-project/sail-riscv . Remove it ...
Robert Norton
2018-11-29
RISC-V: implement WFI in the platform model.
Prashanth Mundkur
2018-11-29
RISC-V: factor the execution trace.
Prashanth Mundkur
2018-11-07
Move inline forall in function definitions
Alasdair Armstrong
2018-10-23
RISC-V: Add a platform knob to control mtval contents on illegal instruction ...
Prashanth Mundkur
2018-10-23
RISC-V: Add some debug logs for within_phys_mem.
Prashanth Mundkur
2018-08-31
Some C stubs for platform bits for RISC-V.
Prashanth Mundkur
2018-08-15
Temporary fix for RISC-V Lem generation
Brian Campbell
2018-08-13
More RISC-V built-in type constraints
Brian Campbell
2018-07-20
Add assorted comments, consistency fixes and cleanup.
Prashanth Mundkur
2018-07-11
RISC-V model fixes for RMEM
Jon French
2018-07-07
Cancel riscv reservation before i/o scheduling, tweak reservation tracing.
Prashanth Mundkur
2018-07-03
Allow the riscv htif_tohost mmio port to be readable, and ack writes to that ...
Prashanth Mundkur
2018-06-25
Add a riscv platform parameter to control trapping to M-mode on misaligned ac...
Prashanth Mundkur
2018-06-25
Fix riscv interrupt pending check to handle implicit enabling at lower privil...
Prashanth Mundkur
2018-06-23
Fix a missing check for interrupt dispatch when riscv clint registers are wri...
Prashanth Mundkur
2018-06-22
Make riscv pte dirty-bit update handling configurable via a platform cli option.
Prashanth Mundkur
2018-06-19
Add more detail to riscv execution trace log.
Prashanth Mundkur
2018-06-11
Use riscv platform insns_per_tick to tick the clock.
Prashanth Mundkur
2018-06-08
Fix mmio address matching for clint device.
Prashanth Mundkur
2018-06-08
Add mem and mmio access tracing.
Prashanth Mundkur
2018-06-07
Slight refactor to keep platform handling localized to the _platform file.
Prashanth Mundkur
2018-06-07
More definitions for the physical memory map.
Prashanth Mundkur
2018-06-07
Add terminal output to riscv platform, with incomplete handling of input.
Prashanth Mundkur
2018-06-07
Fix Lem build of RISC-V
Thomas Bauereiss
2018-06-04
Add the htif exit command, a top-level function to initialize the riscv platf...
Prashanth Mundkur
2018-06-04
Uncomment the clint implementation in riscv_platform.
Prashanth Mundkur
2018-05-22
Fix for E_cons not being compiled correctly into OCaml
Alasdair Armstrong
2018-05-22
Fix Lem build for RISC-V
Thomas Bauereiss
2018-05-21
Add the missed _tags file, and fix a typo.
Prashanth Mundkur
2018-05-21
Add in the platform files and update the ocaml build. Disable the isabelle b...
Prashanth Mundkur