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Formal specification language for ISAs
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Author
2018-12-20
RISVC model is now at https://github.com/rems-project/sail-riscv . Remove it ...
Robert Norton
2018-09-06
RISCV: Get enough of the RISCV platform into C to run some tests
Alasdair Armstrong
2018-08-29
C: Fix some issues with tuples as arguments to polymorphic constructors
Alasdair Armstrong
2018-06-11
Merge branch 'sail2' into mappings
Jon French
2018-05-23
restore original riscv main
Jon French
2018-05-21
Move the top-level loop from main to riscv_step, but remove elf bits.
Prashanth Mundkur
2018-05-21
further RISCV mapping: all extant non-compressed instructions done
Jon French
2018-05-15
Merge branch 'sail2' into mappings
Jon French
2018-05-15
Fix the ebreak instruction to trap, and remove the now obsolete internal exce...
Prashanth Mundkur
2018-05-11
...and actually working
Jon French
2018-05-10
more mapping
Jon French
2018-05-09
Remove unused definitions.
Prashanth Mundkur
2018-05-03
Fix interrupt dispatch, improve execution logs, cleanup unused bits.
Prashanth Mundkur
2018-05-03
Simplify the top-level execute loop using the step function.
Prashanth Mundkur
2018-05-03
Fix up interrupt and exception dispatch.
Prashanth Mundkur
2018-05-02
Tick cycle counter in execute loop.
Prashanth Mundkur
2018-04-26
Initial support for faults of reads to physical addresses.
Prashanth Mundkur
2018-04-20
Add a riscv instruction printer for the execution log.
Prashanth Mundkur
2018-04-09
Update riscv to use the new system definitions, remove duplicates.
Prashanth Mundkur
2018-03-19
Fixes to C backend for RISCV-compilation
Alasdair Armstrong
2018-03-07
Make union types consistent in the AST
Alasdair Armstrong
2018-02-06
Add a system initialization function. For now, it merely initializes support...
Prashanth Mundkur
2018-02-01
badaddr is a misleading name, since it could contain what the PC points to fo...
Prashanth Mundkur
2018-02-01
Initial top-level support for compression instructions.
Prashanth Mundkur
2018-01-29
Add some initial exception handling to the riscv execution loop.
Prashanth Mundkur
2018-01-29
riscv: remove break from main loop and place val spec in prelude.
Robert Norton
2018-01-25
Extend RISCV main loop with support for tohost interface used by test suite f...
Robert Norton
2018-01-25
work in progress riscv CSR implementation.
Robert Norton