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path: root/mips/mips_prelude.sail
AgeCommit message (Expand)Author
2018-09-21Remove cheri and mips specs -- they now have their own repository.Robert Norton
2018-07-24Merge remote-tracking branch 'origin/sail2' into c_fixesAlasdair Armstrong
2018-07-03cheri: refine lwl/lwr cap length checks to be exact. They were previously a b...Robert Norton
2018-06-29Try to fix some tricky C compilation bugs, break everything insteadAlasdair Armstrong
2018-06-25mips: add optional tracing of register writes (commented out).Robert Norton
2018-06-22Add bitvector size constraints in MIPSBrian Campbell
2018-05-18mips: add support for CP0 Config0.K0 field because a test has appeared for it...Robert Norton
2018-05-17changes to for testing FreeBSD boot on MIPS: allowing loading raw file in oca...Robert Norton
2018-05-09Use latex support for generating cheri documentation and remove sed based hac...Robert Norton
2018-04-12Add implementations of CReadHwr and CWriteHwrRobert Norton
2018-03-14Add and use execute_branch and execute_branch_pcc functions to align code wit...Robert Norton
2018-03-14rename EXTS and EXTZ to sign_extend and zero_extend because it is more obvios...Robert Norton
2018-03-08rename mips_new_tc to mipsRobert Norton
2018-03-08Remove files in mips directory prior to copying in files from mips_new_tc. Ho...Robert Norton
2018-03-01Add support for read_tag and write_tag in sail_lib.ml. and support for intial...Robert Norton
2017-10-12Work around warning in ocaml shallow embedding of mips caused by buggy code g...Robert Norton
2017-04-25Add support for uart terminal. Also add read_bit_reg function for faster and ...Robert Norton
2017-04-21remove unnecessary cast in incrementCP0Count (run every instruction) for pote...Robert Norton
2017-03-29change reqiured to work with little endian interpreter.Robert Norton
2017-03-24Checkpoint work-in-progress mips sequential interpreter using ocaml shallow e...Robert Norton
2017-02-03Now that 128-bit capabilities are supported we must be stricter about MIPS al...Robert Norton
2017-02-03fix headersPeter Sewell
2017-01-24first pass at cheri128 sail.Robert Norton
2016-10-20changes to support get_model for ppcmem.Robert Norton
2016-09-14Switch mips/cheri over to using memory ea/val for writes. Tag is now first by...Robert Norton
2016-07-28Banish exit from the mips/cheri sail except at end of SignalException functio...Robert Norton
2016-07-26Increase size of TLB to 64 entries. In theory this should improve FreeBSD boo...Robert Norton
2016-07-26Add support for BERI specific behaviour which permits some unaligned accesses...Robert Norton
2016-07-26Add minimal support for emulated Altera JTAG UART.Robert Norton
2016-07-13fixChristopher
2016-06-28Munge exception destination PC so we hit the correct address even when kcc.ba...Robert Norton
2016-06-07remove workarounds for sail unable to read fields during PC fetch. Should be ...Robert Norton
2016-06-07Fix issue in accessing fields and slices of registers during translate addressKathy Gray
2016-06-06Add explicit type cast required because of the way sail does slicing (we want...Robert Norton
2016-06-03Improve formatting of latex export of mips spec: wrap lines, remove dollars i...Robert Norton
2016-06-03Mips file: removed some unnecessary parenthesisKathy Gray
2016-06-03Reduce fill width of header to align closing comments nicely.Robert Norton
2016-06-02Get widening right now that it mattersKathy Gray
2016-06-02Apply headache to mips/cheri model.Robert Norton
2016-05-25add support for capability load/store bits in TLBRobert Norton
2016-05-24restrict virtual and physical address sizes to 40 and 36 bits respectively --...Robert Norton
2016-05-19workaround unable to read fields in PC translation bug.Robert Norton
2016-05-18Make TLB address error exception save BadVAddr.Robert Norton
2016-05-18Implement 8-entry software-managed TLB.Robert Norton
2016-05-13fixes to make counter interrupt work: don't attempt to read register fields d...Robert Norton
2016-05-12Implement count/compare registers for timer interrupts and rdhwr instruction.Robert Norton
2016-05-12update/add some commentsRobert Norton
2016-05-12remove redundant wrapper function 'TranslateOrExit' and rename uses.Robert Norton
2016-05-12Enforce kernel only access to kernel address space. Doesn't really make any d...Robert Norton
2016-05-03fix cheri and mips sail following change to type of TranslateAddress -- can n...Robert Norton
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