| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-03-08 | Adds the DC and IC instructions to AArch64_small; | Shaked Flur |
| 2018-12-22 | Added RISC-V fence.tso | Shaked Flur |
| 2018-02-08 | replaced NIA_LR/CTR/register with NIA_indirect; | Shaked Flur |
| 2017-11-01 | added RISC-V "fence r,r" | Shaked Flur |
| 2017-09-20 | add support for x86 lock prefix (also remove unused Read/Write_tag kind in et... | Robert Norton |
| 2017-09-15 | x86: implement regfp analysis function (no control flow yet) | Robert Norton |
| 2017-09-03 | added RISC-V strong-acquire/release | Shaked Flur |
| 2017-08-31 | added RISC-V AMOs | Shaked Flur |
| 2017-08-22 | added RISC-V "fence w,w" and "fence.i"; | Shaked Flur |
| 2017-08-19 | RISC-V store-release | Shaked Flur |
| 2017-08-17 | added RISC-V load-acquire | Shaked Flur |
| 2017-04-18 | added transactional memory support | Shaked Flur |
| 2016-11-30 | add new barrier kind for MIPS (only one for now). | Robert Norton |
| 2016-11-07 | factor out regfp analysis types into etc/regfp.sail | Christopher Pulte |
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index : sail | |
| Formal specification language for ISAs |
| summaryrefslogtreecommitdiff |