summaryrefslogtreecommitdiff
path: root/riscv/riscv_sim.c
diff options
context:
space:
mode:
authorPrashanth Mundkur2018-10-08 09:35:11 -0700
committerPrashanth Mundkur2018-10-23 15:32:15 -0700
commitd43b475507ed9144b26be124376c3e656005a416 (patch)
tree5d4bc4eba9b4993610ee9098abbd68c2cac01fe0 /riscv/riscv_sim.c
parente3490924e6bce23d3d4b236fdc61c7345a17e814 (diff)
RISC-V: Add a platform knob to control mtval contents on illegal instruction faults.
Diffstat (limited to 'riscv/riscv_sim.c')
-rw-r--r--riscv/riscv_sim.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/riscv/riscv_sim.c b/riscv/riscv_sim.c
index 79c353f9..9db1ea59 100644
--- a/riscv/riscv_sim.c
+++ b/riscv/riscv_sim.c
@@ -42,11 +42,12 @@ struct tv_spike_t *s = NULL;
char *term_log = NULL;
static struct option options[] = {
- {"enable-dirty", no_argument, 0, 'd'},
- {"enable-misaligned", no_argument, 0, 'm'},
- {"dump-dts", no_argument, 0, 's'},
- {"terminal-log", required_argument, 0, 't'},
- {"help", no_argument, 0, 'h'},
+ {"enable-dirty", no_argument, 0, 'd'},
+ {"enable-misaligned", no_argument, 0, 'm'},
+ {"mtval-has-illegal-inst-bits", no_argument, 0, 'i'},
+ {"dump-dts", no_argument, 0, 's'},
+ {"terminal-log", required_argument, 0, 't'},
+ {"help", no_argument, 0, 'h'},
{0, 0, 0, 0}
};