diff options
| author | Alasdair Armstrong | 2018-10-29 16:27:47 +0000 |
|---|---|---|
| committer | GitHub | 2018-10-29 16:27:47 +0000 |
| commit | 29f69b03602552d3ca1a29713527d21f5790e28a (patch) | |
| tree | bd9a56d787ff8cf3bafacfeda771350bb854ab71 /riscv/riscv_platform_impl.c | |
| parent | 5471af45fd04169eb184371dcd8f791e507eab6f (diff) | |
| parent | 8ae06c742324160e2677f233a8e509eaa46b54c3 (diff) | |
Merge pull request #21 from rems-project/riscv_c_platform
Merge C platform bits for RISC-V
Diffstat (limited to 'riscv/riscv_platform_impl.c')
| -rw-r--r-- | riscv/riscv_platform_impl.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/riscv/riscv_platform_impl.c b/riscv/riscv_platform_impl.c new file mode 100644 index 00000000..04a661c0 --- /dev/null +++ b/riscv/riscv_platform_impl.c @@ -0,0 +1,29 @@ +#include "riscv_platform_impl.h" +#include <unistd.h> +#include <stdio.h> + +/* Settings of the platform implementation, with common defaults. */ + +bool rv_enable_dirty_update = false; +bool rv_enable_misaligned = false; +bool rv_mtval_has_illegal_inst_bits = false; + +uint64_t rv_ram_base = UINT64_C(0x80000000); +uint64_t rv_ram_size = UINT64_C(0x80000000); + +uint64_t rv_rom_base = UINT64_C(0x1000); +uint64_t rv_rom_size = UINT64_C(0x100); + +uint64_t rv_clint_base = UINT64_C(0x2000000); +uint64_t rv_clint_size = UINT64_C(0xc0000); + +uint64_t rv_htif_tohost = UINT64_C(0x80001000); +uint64_t rv_insns_per_tick = UINT64_C(100); + +int term_fd = 1; // set during startup +void plat_term_write_impl(char c) +{ + if (write(term_fd, &c, sizeof(c)) < 0) { + fprintf(stderr, "Unable to write to terminal!\n"); + } +} |
