diff options
| author | Jon French | 2018-07-10 16:36:16 +0100 |
|---|---|---|
| committer | Jon French | 2018-07-10 16:36:24 +0100 |
| commit | 6bc52192841d712cb8d582841b0a73d2b7f59df6 (patch) | |
| tree | c38e336cdc6c6afb5a32d5917b4c11a678395c48 /riscv/riscv_extras.lem | |
| parent | 115c33129aa7dc3f0f0f6232c8e5fd892c79eb87 (diff) | |
RISCV load-acquire in Lem (-> rmem)
Diffstat (limited to 'riscv/riscv_extras.lem')
| -rw-r--r-- | riscv/riscv_extras.lem | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/riscv/riscv_extras.lem b/riscv/riscv_extras.lem index 60b635da..60468a4e 100644 --- a/riscv/riscv_extras.lem +++ b/riscv/riscv_extras.lem @@ -34,6 +34,20 @@ let MEMea_conditional_release addr size = write_mem_ea Write_RISCV_conditional_ let MEMea_conditional_strong_release addr size = write_mem_ea Write_RISCV_conditional_strong_release addr size +val MEMr : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e +val MEMr_reserved_strong_acquire : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> monad 'rv (bitvector 'b) 'e + +let MEMr addrsize size hexRAM addr = read_mem Read_plain addr size +let MEMr_acquire addrsize size hexRAM addr = read_mem Read_RISCV_acquire addr size +let MEMr_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_strong_acquire addr size +let MEMr_reserved addrsize size hexRAM addr = read_mem Read_RISCV_reserved addr size +let MEMr_reserved_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_acquire addr size +let MEMr_reserved_strong_acquire addrsize size hexRAM addr = read_mem Read_RISCV_reserved_strong_acquire addr size + val write_ram : forall 'rv 'a 'b 'e. Size 'a, Size 'b => integer -> integer -> bitvector 'a -> bitvector 'a -> bitvector 'b -> monad 'rv unit 'e let write_ram addrsize size hexRAM address value = |