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| author | Jon French | 2018-05-11 17:26:27 +0100 |
|---|---|---|
| committer | Jon French | 2018-05-11 17:26:27 +0100 |
| commit | eba4bcaebd7cddda799a4e192add09431b5d4099 (patch) | |
| tree | 717666d5186c9aebd56023f229dcfa6067ce4cd7 /riscv/riscv.sail | |
| parent | 0e7a57c63b0430b4d5b126a3ddce26eacf1f272c (diff) | |
...and actually working
Diffstat (limited to 'riscv/riscv.sail')
| -rw-r--r-- | riscv/riscv.sail | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/riscv.sail b/riscv/riscv.sail index 6ede17b1..84f0f279 100644 --- a/riscv/riscv.sail +++ b/riscv/riscv.sail @@ -149,7 +149,7 @@ mapping btype_mnemonic = { RISCV_BGEU <-> "bgeu" } -mapping clause assembly = BTYPE(imm, rs2, rs1, op) <-> btype_mnemonic(op) ^^ spaces() ^^ reg_name(rs1) ^^ operand_sep() ^^ reg_name(rs2) ^^ operand_sep() ^^ hex_bits_13(imm) +mapping clause assembly = BTYPE(imm, rs2, rs1, op) <-> btype_mnemonic(op) ^^ spaces() ^^ reg_name(rs1) ^^ operand_sep() ^^ reg_name(rs2) ^^ operand_sep() ^^ hex_bits_13(imm) /* ****************************************************************** */ |