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| author | Robert Norton | 2018-03-14 16:05:37 +0000 |
|---|---|---|
| committer | Robert Norton | 2018-03-14 18:04:09 +0000 |
| commit | 26c7468c15c15424535afebc12e995a3a746476f (patch) | |
| tree | eef4818c21d114150e781056fccd0a0017c33e39 /mips/mips_prelude.sail | |
| parent | 4c3579a6e4bd10e05f381235e4827b945553d0c1 (diff) | |
rename EXTS and EXTZ to sign_extend and zero_extend because it is more obviosu and to more closely match existing cheri pseudocode.
Diffstat (limited to 'mips/mips_prelude.sail')
| -rw-r--r-- | mips/mips_prelude.sail | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/mips/mips_prelude.sail b/mips/mips_prelude.sail index b4f09548..b672d993 100644 --- a/mips/mips_prelude.sail +++ b/mips/mips_prelude.sail @@ -425,7 +425,7 @@ function SignalExceptionMIPS (ex, kccBase) = 0xFFFFFFFF80000000; /* On CHERI we have to subtract KCC.base so that we end up at the right absolute vector address after indirecting via new PCC */ - nextPC = vectorBase + EXTS(vectorOffset) - kccBase; + nextPC = vectorBase + sign_extend(vectorOffset) - kccBase; CP0Cause->ExcCode() = ExceptionCode(ex); CP0Status->EXL() = 0b1; throw (ISAException()); |