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authorRobert Norton2016-11-11 17:24:40 +0000
committerRobert Norton2016-11-11 17:25:08 +0000
commitfcbdfe60bb733ab8bbbfe386ea5baabe2d2d56e0 (patch)
treebcf511f1707621aad67ae1b4b1802646521a04ff
parent6602c7fa9326729ff8378d57af79b1a1137cb4e3 (diff)
mips_regfp: add missing output register for store conditional.
-rw-r--r--mips/mips_regfp.sail1
1 files changed, 1 insertions, 0 deletions
diff --git a/mips/mips_regfp.sail b/mips/mips_regfp.sail
index b7cfce2b..816cd1fe 100644
--- a/mips/mips_regfp.sail
+++ b/mips/mips_regfp.sail
@@ -347,6 +347,7 @@ function (regfps,regfps,regfps,niafps,diafp,instruction_kind) initial_analysis (
if base == 0 then () else aR := RFull(GPRs[base]) :: aR;
iR := aR;
if conditional then iR := RFull("CP0LLBit")::iR else ();
+ if (conditional & (rt != 0)) then oR := RFull(GPRs[rt])::oR else ();
if rt == 0 then () else iR := RFull(GPRs[rt]) :: iR;
}
case (LWL(base, rt, offset)) -> {