From fcbdfe60bb733ab8bbbfe386ea5baabe2d2d56e0 Mon Sep 17 00:00:00 2001
From: Robert Norton
Date: Fri, 11 Nov 2016 17:24:40 +0000
Subject: mips_regfp: add missing output register for store conditional.

---
 mips/mips_regfp.sail | 1 +
 1 file changed, 1 insertion(+)

diff --git a/mips/mips_regfp.sail b/mips/mips_regfp.sail
index b7cfce2b..816cd1fe 100644
--- a/mips/mips_regfp.sail
+++ b/mips/mips_regfp.sail
@@ -347,6 +347,7 @@ function (regfps,regfps,regfps,niafps,diafp,instruction_kind) initial_analysis (
       if base == 0 then () else aR := RFull(GPRs[base]) :: aR;
       iR := aR;
       if conditional then iR := RFull("CP0LLBit")::iR else ();
+      if (conditional & (rt != 0)) then oR := RFull(GPRs[rt])::oR else ();
       if rt == 0 then () else iR := RFull(GPRs[rt]) :: iR;
     }
     case (LWL(base, rt, offset)) -> {
-- 
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