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/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2015 Daniel Campora
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
__stack_size__ = 1024;
MEMORY
{
SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
}
ENTRY(ResetISR)
SECTIONS
{
.text :
{
_text = .;
KEEP(*(.intvecs))
*(.boot*)
*(.text*)
*(.rodata*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(8);
} > SRAM
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
_etext = .;
} > SRAM
.data :
{
_data = .;
*(.data*)
. = ALIGN (8);
_edata = .;
} > SRAM
.bss :
{
_bss = .;
*(.bss*)
*(COMMON)
_ebss = .;
} > SRAM
.stack ORIGIN(SRAM) + LENGTH(SRAM) - __stack_size__ :
{
. = ALIGN(8);
_stack = .;
. = . + __stack_size__;
. = ALIGN(8);
_estack = .;
} > SRAM
}
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