diff options
| author | Paul Sokolovsky | 2015-10-24 02:26:10 +0300 |
|---|---|---|
| committer | Paul Sokolovsky | 2015-10-24 15:46:53 +0300 |
| commit | 0dbd928ceefed09d65276211c70d0137b4734011 (patch) | |
| tree | 27ae07b46c07da5185d3023b2e788bb102915f54 /teensy/Makefile | |
| parent | 9a334d41e3c20dfde053cd95b9f80c384c51c2a9 (diff) | |
Makefiles: Remove duplicate object files when linking.
Scenario: module1 depends on some common file from lib/, so specifies it
in its SRC_MOD, and the same situation with module2, then common file
from lib/ eventually ends up listed twice in $(OBJ), which leads to link
errors.
Make is equipped to deal with such situation easily, quoting the manual:
"The value of $^ omits duplicate prerequisites, while $+ retains them and
preserves their order." So, just use $^ consistently in all link targets.
Diffstat (limited to 'teensy/Makefile')
| -rw-r--r-- | teensy/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/teensy/Makefile b/teensy/Makefile index dece6ce00..32f753b3e 100644 --- a/teensy/Makefile +++ b/teensy/Makefile @@ -156,7 +156,7 @@ deploy: post_compile reboot $(BUILD)/micropython.elf: $(OBJ) $(ECHO) "LINK $@" - $(Q)$(CC) $(LDFLAGS) -o "$@" -Wl,-Map,$(@:.elf=.map) $(OBJ) $(LIBS) + $(Q)$(CC) $(LDFLAGS) -o "$@" -Wl,-Map,$(@:.elf=.map) $^ $(LIBS) $(Q)$(SIZE) $@ ifeq ($(MEMZIP_DIR),) |