aboutsummaryrefslogtreecommitdiff
path: root/stmhal/system_stm32f4xx.c
diff options
context:
space:
mode:
authorDave Hylands2014-03-14 00:51:26 -0700
committerDave Hylands2014-03-14 09:48:49 -0700
commit0a64c92a9c3bd7d648c8a0d087fa7e739a5eeaa3 (patch)
tree0d36bb17c7bbb00c14a61a072d667162d7c9ff8f /stmhal/system_stm32f4xx.c
parent33bdd2119d9ca28404acc2b0891d5a74997a0d05 (diff)
stmhal - add led support. Add netduino_plus_2 support
Tweaked a couple of the USB files to compile if neither dev nor host was defined. Tested on netduiono plus 2 and stm32f4discovery boards
Diffstat (limited to 'stmhal/system_stm32f4xx.c')
-rw-r--r--stmhal/system_stm32f4xx.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/stmhal/system_stm32f4xx.c b/stmhal/system_stm32f4xx.c
index 4e5490db5..f5a97c0ef 100644
--- a/stmhal/system_stm32f4xx.c
+++ b/stmhal/system_stm32f4xx.c
@@ -267,8 +267,8 @@ void SystemCoreClockUpdate(void)
* AHB Prescaler = 1
* APB1 Prescaler = 4
* APB2 Prescaler = 2
- * HSE Frequency(Hz) = 8000000
- * PLL_M = 8
+ * HSE Frequency(Hz) = HSE_VALUE
+ * PLL_M = HSE_VALUE/1000000
* PLL_N = 336
* PLL_P = 2
* PLL_Q = 7
@@ -296,7 +296,7 @@ void SystemClock_Config(void)
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLM = 8;
+ RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
RCC_OscInitStruct.PLL.PLLN = 336;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;