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authorEero af Heurlin2015-05-02 19:31:39 +0300
committerDamien George2015-05-03 13:48:26 +0100
commit2378be4e933dda0f7e7adb2f227530d3fcc3a6aa (patch)
tree1269a4bfeac520370778f61dfa537592cb62768f /stmhal/boards/NETDUINO_PLUS_2
parent8c8d7f3c60ff10e90243b47172a6979bdf2b9fd1 (diff)
stmhal: Allow to configure UART pins completely via mpconfigboard.h.
Diffstat (limited to 'stmhal/boards/NETDUINO_PLUS_2')
-rw-r--r--stmhal/boards/NETDUINO_PLUS_2/mpconfigboard.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/stmhal/boards/NETDUINO_PLUS_2/mpconfigboard.h b/stmhal/boards/NETDUINO_PLUS_2/mpconfigboard.h
index a985f52fd..fba726596 100644
--- a/stmhal/boards/NETDUINO_PLUS_2/mpconfigboard.h
+++ b/stmhal/boards/NETDUINO_PLUS_2/mpconfigboard.h
@@ -28,6 +28,22 @@
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
#define MICROPY_HW_CLK_PLLQ (7)
+// UART config
+#define MICROPY_HW_UART1_PORT (GPIOA)
+#define MICROPY_HW_UART1_PINS (GPIO_PIN_9 | GPIO_PIN_10)
+#define MICROPY_HW_UART2_PORT (GPIOA)
+#define MICROPY_HW_UART2_PINS (GPIO_PIN_2 | GPIO_PIN_3)
+#define MICROPY_HW_UART2_RTS (GPIO_PIN_1)
+#define MICROPY_HW_UART2_CTS (GPIO_PIN_0)
+#define MICROPY_HW_UART3_PORT (GPIOD)
+#define MICROPY_HW_UART3_PINS (GPIO_PIN_8 | GPIO_PIN_9)
+#define MICROPY_HW_UART3_RTS (GPIO_PIN_12)
+#define MICROPY_HW_UART3_CTS (GPIO_PIN_11)
+#define MICROPY_HW_UART4_PORT (GPIOA)
+#define MICROPY_HW_UART4_PINS (GPIO_PIN_0 | GPIO_PIN_1)
+#define MICROPY_HW_UART6_PORT (GPIOC)
+#define MICROPY_HW_UART6_PINS (GPIO_PIN_6 | GPIO_PIN_7)
+
// I2C busses
#define MICROPY_HW_I2C2_SCL (pin_B10)
#define MICROPY_HW_I2C2_SDA (pin_B11)