diff options
| author | Damien | 2013-12-22 20:15:41 +0000 |
|---|---|---|
| committer | Damien | 2013-12-22 20:15:41 +0000 |
| commit | b8ecc29f3b2f07d22edc42023733bca72f39164c (patch) | |
| tree | 459c26aea158f9effb5ea72c59069facb89d696b /pybv3/eagle | |
| parent | 5bbc3cdc0e081114e9fea0c71766e98a8ec8c8b7 (diff) | |
Add PYBv3 EAGLE files, gerbers, schematic, BOM and assembly guide.
Diffstat (limited to 'pybv3/eagle')
| -rw-r--r-- | pybv3/eagle/pinhead.lbr | 1058 | ||||
| -rw-r--r-- | pybv3/eagle/pyboard.brd | 3419 | ||||
| -rw-r--r-- | pybv3/eagle/pyboard.lbr | 843 | ||||
| -rw-r--r-- | pybv3/eagle/pyboard.sch | 8946 | ||||
| -rw-r--r-- | pybv3/eagle/rcl.lbr | 4745 | ||||
| -rw-r--r-- | pybv3/eagle/supply1.lbr | 152 |
6 files changed, 19163 insertions, 0 deletions
diff --git a/pybv3/eagle/pinhead.lbr b/pybv3/eagle/pinhead.lbr new file mode 100644 index 000000000..e813adcde --- /dev/null +++ b/pybv3/eagle/pinhead.lbr @@ -0,0 +1,1058 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="6.5.0"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="1" unitdist="mic" unit="mic" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/> +<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/> +<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/> +<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/> +<layer number="32" name="bCream" color="7" fill="5" visible="no" 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+<connect gate="A" pin="7" pad="7"/> +<connect gate="A" pin="8" pad="8"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="/90" package="2X04/90"> +<connects> +<connect gate="A" pin="1" pad="1"/> +<connect gate="A" pin="2" pad="2"/> +<connect gate="A" pin="3" pad="3"/> +<connect gate="A" pin="4" pad="4"/> +<connect gate="A" pin="5" pad="5"/> +<connect gate="A" pin="6" pad="6"/> +<connect gate="A" pin="7" pad="7"/> +<connect gate="A" pin="8" pad="8"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> diff --git a/pybv3/eagle/pyboard.brd b/pybv3/eagle/pyboard.brd new file mode 100644 index 000000000..850b24536 --- /dev/null +++ b/pybv3/eagle/pyboard.brd @@ -0,0 +1,3419 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="6.5.0"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting 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layer="46" curve="90"/> +<wire x1="-3.75" y1="-1.325" x2="3.75" y2="-1.325" width="0.127" layer="21"/> +<wire x1="3.75" y1="1.2" x2="3.75" y2="2.975" width="0.127" layer="21"/> +<wire x1="3.75" y1="2.975" x2="3" y2="2.975" width="0.127" layer="21"/> +<wire x1="-3.75" y1="1.2" x2="-3.75" y2="2.975" width="0.127" layer="21"/> +<wire x1="-3.75" y1="2.975" x2="-3" y2="2.975" width="0.127" layer="21"/> +</package> +</packages> +</library> +<library name="rcl"> +<description><b>Resistors, Capacitors, Inductors</b><p> +Based on the previous libraries: +<ul> +<li>r.lbr +<li>cap.lbr +<li>cap-fe.lbr +<li>captant.lbr +<li>polcap.lbr +<li>ipc-smd.lbr +</ul> +All SMD packages are defined according to the IPC specifications and CECC<p> +<author>Created by librarian@cadsoft.de</author><p> +<p> +for Electrolyt Capacitors see also :<p> +www.bccomponents.com <p> +www.panasonic.com<p> +www.kemet.com<p> +http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf <b>(SANYO)</b> +<p> +for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p> + +<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0> +<tr valign="top"> + +<! <td width="10">&nbsp;</td> +<td width="90%"> + +<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b> +<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2> + <TR> + <TD COLSPAN=8> + <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI&nbsp;TECH</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT> + </B> + </TD><TD>&nbsp;</TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 > + 3005P<BR> + 3006P<BR> + 3006W<BR> + 3006Y<BR> + 3009P<BR> + 3009W<BR> + 3009Y<BR> + 3057J<BR> + 3057L<BR> + 3057P<BR> + 3057Y<BR> + 3059J<BR> + 3059L<BR> + 3059P<BR> + 3059Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 89P<BR> + 89W<BR> + 89X<BR> + 89PH<BR> + 76P<BR> + 89XH<BR> + 78SLT<BR> + 78L&nbsp;ALT<BR> + 56P&nbsp;ALT<BR> + 78P&nbsp;ALT<BR> + T8S<BR> + 78L<BR> + 56P<BR> + 78P<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + T18/784<BR> + 783<BR> + 781<BR> + -<BR> + -<BR> + -<BR> + 2199<BR> + 1697/1897<BR> + 1680/1880<BR> + 2187<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 8035EKP/CT20/RJ-20P<BR> + -<BR> + RJ-20X<BR> + -<BR> + -<BR> + -<BR> + 1211L<BR> + 8012EKQ&nbsp;ALT<BR> + 8012EKR&nbsp;ALT<BR> + 1211P<BR> + 8012EKJ<BR> + 8012EKL<BR> + 8012EKQ<BR> + 8012EKR<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 2101P<BR> + 2101W<BR> + 2101Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 2102L<BR> + 2102S<BR> + 2102Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVMCOG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 43P<BR> + 43W<BR> + 43Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 40L<BR> + 40P<BR> + 40Y<BR> + 70Y-T602<BR> + 70L<BR> + 70P<BR> + 70Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + RT/RTR12<BR> + RT/RTR12<BR> + RT/RTR12<BR> + -<BR> + RJ/RJR12<BR> + RJ/RJR12<BR> + RJ/RJR12<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + -<BR> + -<BR> + EVMM0<BR> + -<BR> + -<BR> + EVMM3<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 62-3-1<BR> + 62-1-2<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67R<BR> + -<BR> + 67P<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67X<BR> + 63V<BR> + 63S<BR> + 63M<BR> + -<BR> + -<BR> + 63H<BR> + 63P<BR> + -<BR> + -<BR> + 63X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P>&nbsp;<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3> + <TR> + <TD COLSPAN=7> + <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT> + <P> + <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3224G<BR> + 3224J<BR> + 3224W<BR> + 3269P<BR> + 3269W<BR> + 3269X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 44G<BR> + 44J<BR> + 44W<BR> + 84P<BR> + 84W<BR> + 84X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST63Z<BR> + ST63Y<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST5P<BR> + ST5W<BR> + ST5X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=7> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> 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SIZE=3> + -<BR> + -<BR> + DVR-43A<BR> + CVR-42C<BR> + CVR-42A/C<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P> +<FONT SIZE=4 FACE=ARIAL><B>ALT =&nbsp;ALTERNATE</B></FONT> +<P> + +&nbsp; +<P> +</td> +</tr> +</table></description> +<packages> +<package name="R0603"> +<description><b>RESISTOR</b></description> +<wire x1="-0.432" y1="-0.356" x2="0.432" y2="-0.356" width="0.1524" layer="51"/> +<wire x1="0.432" y1="0.356" x2="-0.432" y2="0.356" width="0.1524" layer="51"/> +<wire x1="-1.473" y1="0.983" x2="1.473" y2="0.983" width="0.0508" layer="39"/> +<wire x1="1.473" y1="0.983" x2="1.473" y2="-0.983" width="0.0508" layer="39"/> +<wire x1="1.473" y1="-0.983" x2="-1.473" y2="-0.983" width="0.0508" layer="39"/> +<wire x1="-1.473" y1="-0.983" x2="-1.473" y2="0.983" width="0.0508" layer="39"/> +<smd name="1" x="-0.85" y="0" dx="1" dy="1.1" layer="1"/> +<smd name="2" x="0.85" y="0" dx="1" dy="1.1" layer="1"/> +<text x="-0.635" y="0.635" size="1.27" layer="25">>NAME</text> +<text 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This minimum drill endsize can be set lower if needed. Values below 0.25mm will result in a higher DrillClassification. For details see the Eurocircuits Classification overview. +<p> +<u>Extra Notes:</u><br> +- The option <b>Distance-Copper/Dimension</b> is set to 0.25mm, the default for boards with a routed boardoutline. If you require Vcut on your board this parameter should be set to 0.45mm.<br> +- The option <b>Supply-Generate thermals for vias</b> is on by default but may be changed if required.<br> +- The option <b>Mask-Stop</b> is set to 0mm oversize which is the preffered value.<br> +- The option <b>Mask-Cream</b> is set to 0mm oversize by default, but may be changed if required<br> +- The option <b>Mask-Limit</b> is set to 0.45mm, resulting in covered or tented via holes for vias of 0.45mm and smaller. The option may be changed if required.<br> +- The options <b>Shapes</b> and <b>Misc</b> are not relevant. Values for <b>Shapes-Smds-Roundness</b> are not critical and can be set as you require. +<p> +<p> +You can set higher minimum values if you wish, setting lower minimum values is <u>not advisable</u>.<br> +If you need lower minimum values, please use a different Eurocircuits-EAGLE design rule file. For details see the Eurocircuits-EAGLE dru overview table. +<p> +Your Eurocircuits Team +</description> +<description language="en"> + +<p> +<b>Eurocircuits-EAGLE design rules</b><br> +<br> +Setup for <b>2-layer PatternClass6 BaseCopperO18 eCDefault</b> +<p> + The option <b>Sizes-Minimum Drill</b> is set to 0.35mm. This minimum drill endsize can be set lower if needed. Values below 0.25mm will result in a higher DrillClassification. For details see the Eurocircuits Classification overview. +<p> +<u>Extra Notes:</u><br> +- The option <b>Distance-Copper/Dimension</b> is set to 0.25mm, the default for boards with a routed boardoutline. If you require Vcut on your board this parameter should be set to 0.45mm.<br> +- The option <b>Supply-Generate thermals for vias</b> is on by default but may be changed if required.<br> +- The option <b>Mask-Stop</b> is set to 0mm oversize which is the preffered value.<br> +- The option <b>Mask-Cream</b> is set to 0mm oversize by default, but may be changed if required<br> +- The option <b>Mask-Limit</b> is set to 0.45mm, resulting in covered or tented via holes for vias of 0.45mm and smaller. The option may be changed if required.<br> +- The options <b>Shapes</b> and <b>Misc</b> are not relevant. Values for <b>Shapes-Smds-Roundness</b> are not critical and can be set as you require. +<p> +<p> +You can set higher minimum values if you wish, setting lower minimum values is <u>not advisable</u>.<br> +If you need lower minimum values, please use a different Eurocircuits-EAGLE design rule file. For details see the Eurocircuits-EAGLE dru overview table. +<p> +Your Eurocircuits Team +</description> +<param name="layerSetup" value="(1*16)"/> +<param name="mtCopper" value="0.018mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.018mm"/> +<param name="mtIsolate" value="1.55mm 0.71mm 0.36mm 0.2mm 0.2mm 0.2mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/> +<param name="mdWireWire" value="0.15mm"/> +<param name="mdWirePad" value="0.15mm"/> +<param name="mdWireVia" value="0.15mm"/> +<param name="mdPadPad" value="0.15mm"/> +<param name="mdPadVia" value="0.15mm"/> +<param name="mdViaVia" value="0.15mm"/> +<param name="mdSmdPad" value="0mil"/> +<param name="mdSmdVia" value="0mil"/> +<param name="mdSmdSmd" value="0mil"/> +<param name="mdViaViaSameLayer" value="0.2mm"/> +<param name="mnLayersViaInSmd" value="2"/> +<param name="mdCopperDimension" value="0.25mm"/> +<param name="mdDrill" value="0.35mm"/> +<param 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+</device> +<device name="50X32" package="TXC-SMD-50X32"> +<connects> +<connect gate="Q$1" pin="P$1" pad="P$1"/> +<connect gate="Q$1" pin="P$2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="USB-MICRO-AB"> +<gates> +<gate name="G$1" symbol="USB-MICRO-B-SYM" x="-5.08" y="0"/> +</gates> +<devices> +<device name="" package="HRS-USB-ZX62D-AB-5P8-PKG"> +<connects> +<connect gate="G$1" pin="D+" pad="P$3"/> +<connect gate="G$1" pin="D-" pad="P$2"/> +<connect gate="G$1" pin="GND" pad="P$5"/> +<connect gate="G$1" pin="ID" pad="P$4"/> +<connect gate="G$1" pin="VUSB" pad="P$1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> diff --git a/pybv3/eagle/pyboard.sch b/pybv3/eagle/pyboard.sch new file mode 100644 index 000000000..13529c897 --- /dev/null +++ b/pybv3/eagle/pyboard.sch @@ -0,0 +1,8946 @@ +<?xml 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+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/> +<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/> +<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/> +<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> +<layer number="100" name="Muster" color="7" fill="1" visible="no" active="no"/> +<layer number="101" name="Patch_Top" color="12" fill="4" visible="yes" active="yes"/> +<layer number="102" name="Vscore" color="7" fill="1" visible="yes" active="yes"/> +<layer number="103" name="tMap" color="7" fill="1" visible="yes" active="yes"/> +<layer number="104" name="Name" color="16" fill="1" visible="yes" active="yes"/> +<layer number="105" name="tPlate" color="7" fill="1" visible="yes" active="yes"/> +<layer number="106" name="bPlate" color="7" fill="1" visible="yes" active="yes"/> +<layer number="107" name="Crop" color="7" fill="1" visible="yes" active="yes"/> +<layer number="108" name="tplace-old" color="10" fill="1" visible="yes" active="yes"/> +<layer number="109" name="ref-old" color="11" fill="1" visible="yes" active="yes"/> +<layer number="116" name="Patch_BOT" color="9" fill="4" visible="yes" active="yes"/> +<layer number="121" name="_tsilk" color="7" fill="1" visible="yes" active="yes"/> +<layer number="122" name="_bsilk" color="7" fill="1" visible="yes" active="yes"/> +<layer number="125" name="_tNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="144" name="Drill_legend" color="7" fill="1" visible="yes" active="yes"/> +<layer number="151" name="HeatSink" color="7" fill="1" visible="yes" active="yes"/> +<layer number="199" name="Contour" color="7" fill="1" visible="yes" active="yes"/> +<layer number="200" name="200bmp" color="1" fill="10" visible="yes" active="yes"/> +<layer number="201" name="201bmp" color="2" fill="10" visible="yes" active="yes"/> +<layer number="202" name="202bmp" color="3" fill="10" visible="yes" active="yes"/> +<layer number="203" name="203bmp" color="4" fill="10" visible="yes" active="yes"/> +<layer number="204" name="204bmp" color="5" fill="10" visible="yes" active="yes"/> +<layer number="205" name="205bmp" color="6" fill="10" visible="yes" active="yes"/> +<layer number="206" name="206bmp" color="7" fill="10" visible="yes" active="yes"/> +<layer number="207" name="207bmp" color="8" fill="10" visible="yes" active="yes"/> +<layer number="208" name="208bmp" color="9" fill="10" visible="yes" active="yes"/> +<layer number="209" name="209bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="210" name="210bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="211" name="211bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="212" name="212bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="213" name="213bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="214" name="214bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="215" name="215bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="216" name="216bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="217" name="217bmp" color="18" fill="1" visible="no" active="no"/> +<layer number="218" name="218bmp" color="19" fill="1" visible="no" active="no"/> +<layer number="219" name="219bmp" color="20" fill="1" visible="no" active="no"/> +<layer number="220" name="220bmp" color="21" fill="1" visible="no" active="no"/> +<layer number="221" name="221bmp" color="22" fill="1" visible="no" active="no"/> +<layer number="222" name="222bmp" color="23" fill="1" visible="no" active="no"/> +<layer number="223" name="223bmp" color="24" fill="1" visible="no" active="no"/> +<layer number="224" name="224bmp" color="25" fill="1" visible="no" active="no"/> +<layer number="250" name="Descript" color="3" fill="1" visible="no" active="no"/> +<layer number="251" name="SMDround" color="12" fill="11" visible="no" active="no"/> +<layer number="254" name="cooling" color="7" fill="1" visible="yes" active="yes"/> +</layers> +<schematic xreflabel="%F%N/%S.%C%R" xrefpart="/%S.%C%R"> +<libraries> +<library name="rcl"> +<description><b>Resistors, Capacitors, Inductors</b><p> +Based on the previous libraries: +<ul> +<li>r.lbr +<li>cap.lbr +<li>cap-fe.lbr +<li>captant.lbr +<li>polcap.lbr +<li>ipc-smd.lbr +</ul> +All SMD packages are defined according to the IPC specifications and CECC<p> +<author>Created by librarian@cadsoft.de</author><p> +<p> +for Electrolyt Capacitors see also :<p> +www.bccomponents.com <p> +www.panasonic.com<p> +www.kemet.com<p> +http://www.secc.co.jp/pdf/os_e/2004/e_os_all.pdf <b>(SANYO)</b> +<p> +for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p> + +<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0> +<tr valign="top"> + +<! <td width="10">&nbsp;</td> +<td width="90%"> + +<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b> +<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2> + <TR> + <TD COLSPAN=8> + <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI&nbsp;TECH</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT> + </B> + </TD><TD>&nbsp;</TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 > + 3005P<BR> + 3006P<BR> + 3006W<BR> + 3006Y<BR> + 3009P<BR> + 3009W<BR> + 3009Y<BR> + 3057J<BR> + 3057L<BR> + 3057P<BR> + 3057Y<BR> + 3059J<BR> + 3059L<BR> + 3059P<BR> + 3059Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 89P<BR> + 89W<BR> + 89X<BR> + 89PH<BR> + 76P<BR> + 89XH<BR> + 78SLT<BR> + 78L&nbsp;ALT<BR> + 56P&nbsp;ALT<BR> + 78P&nbsp;ALT<BR> + T8S<BR> + 78L<BR> + 56P<BR> + 78P<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + T18/784<BR> + 783<BR> + 781<BR> + -<BR> + -<BR> + -<BR> + 2199<BR> + 1697/1897<BR> + 1680/1880<BR> + 2187<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 8035EKP/CT20/RJ-20P<BR> + -<BR> + RJ-20X<BR> + -<BR> + -<BR> + -<BR> + 1211L<BR> + 8012EKQ&nbsp;ALT<BR> + 8012EKR&nbsp;ALT<BR> + 1211P<BR> + 8012EKJ<BR> + 8012EKL<BR> + 8012EKQ<BR> + 8012EKR<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 2101P<BR> + 2101W<BR> + 2101Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 2102L<BR> + 2102S<BR> + 2102Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVMCOG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 43P<BR> + 43W<BR> + 43Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 40L<BR> + 40P<BR> + 40Y<BR> + 70Y-T602<BR> + 70L<BR> + 70P<BR> + 70Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + RT/RTR12<BR> + RT/RTR12<BR> + RT/RTR12<BR> + -<BR> + RJ/RJR12<BR> + RJ/RJR12<BR> + RJ/RJR12<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + -<BR> + -<BR> + EVMM0<BR> + -<BR> + -<BR> + EVMM3<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 62-3-1<BR> + 62-1-2<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67R<BR> + -<BR> + 67P<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67X<BR> + 63V<BR> + 63S<BR> + 63M<BR> + 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gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0411/15" package="0411/15"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0411/3V" package="0411V"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0414/15" package="0414/15"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0414/5V" package="0414V"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0617/17" package="0617/17"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0617/22" package="0617/22"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0617/5V" package="0617V"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0922/22" package="0922/22"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0613/5V" package="P0613V"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0613/15" package="P0613/15"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0817/22" package="P0817/22"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0817/7V" package="P0817V"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="V234/12" package="V234/12"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="V235/17" package="V235/17"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="V526-0" package="V526-0"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="MELF0102R" package="MINI_MELF-0102R"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="MELF0102W" package="MINI_MELF-0102W"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="MELF0204R" package="MINI_MELF-0204R"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="MELF0204W" package="MINI_MELF-0204W"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="MELF0207R" package="MINI_MELF-0207R"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="MELF0207W" package="MINI_MELF-0207W"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0922V" package="0922V"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="RDH/15" package="RDH/15"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="MELF0102AX" package="MINI_MELF-0102AX"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="R0201" package="R0201"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="VTA52" package="VTA52"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="VTA53" package="VTA53"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="VTA54" package="VTA54"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="VTA55" package="VTA55"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="VTA56" package="VTA56"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="VMTA55" package="VMTA55"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="VMTB60" package="VMTB60"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="R4527" package="R4527"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="WSC0001" package="WSC0001"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="WSC0002" package="WSC0002"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="WSC01/2" package="WSC01/2"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="WSC2515" package="WSC2515"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="WSC4527" package="WSC4527"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="WSC6927" package="WSC6927"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="R1218" package="R1218"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="1812X7R" package="1812X7R"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="supply1"> +<description><b>Supply Symbols</b><p> + GND, VCC, 0V, +5V, -5V, etc.<p> + Please keep in mind, that these devices are necessary for the + automatic wiring of the supply signals.<p> + The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> + In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> + <author>Created by librarian@cadsoft.de</author></description> +<packages> +</packages> +<symbols> +<symbol name="GND"> +<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/> +<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text> +<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/> +</symbol> +<symbol name="+3V3"> +<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> +<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">>VALUE</text> +<pin name="+3V3" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="GND" prefix="GND"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="1" symbol="GND" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="+3V3" prefix="+3V3"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="G$1" symbol="+3V3" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="pyboard"> +<description>Pyboard library</description> +<packages> +<package name="LQFP64"> +<description><strong>LQFP64</strong><br /></description> +<smd name="1" x="-3.75" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="2" x="-3.25" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="3" x="-2.75" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="4" x="-2.25" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="5" x="-1.75" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="6" x="-1.25" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="7" x="-0.75" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="8" x="-0.25" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="9" x="0.25" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="10" x="0.75" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="11" x="1.25" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="12" x="1.75" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="13" x="2.25" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="14" x="2.75" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="15" x="3.25" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="16" x="3.75" y="-6" dx="1.2" dy="0.24" layer="1" rot="R90"/> +<smd name="17" x="6" y="-3.75" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="18" x="6" y="-3.25" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="19" x="6" y="-2.75" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="20" x="6" y="-2.25" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="21" x="6" y="-1.75" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="22" x="6" y="-1.25" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="23" x="6" y="-0.75" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="24" x="6" y="-0.25" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="25" x="6" y="0.25" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="26" x="6" y="0.75" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="27" x="6" y="1.25" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="28" x="6" y="1.75" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="29" x="6" y="2.25" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="30" x="6" y="2.75" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="31" x="6" y="3.25" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="32" x="6" y="3.75" dx="1.2" dy="0.24" layer="1" rot="R180"/> +<smd name="33" x="3.75" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="34" x="3.25" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="35" x="2.75" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="36" x="2.25" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="37" x="1.75" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="38" x="1.25" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="39" x="0.75" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="40" x="0.25" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="41" x="-0.25" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="42" x="-0.75" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="43" x="-1.25" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="44" x="-1.75" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="45" x="-2.25" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="46" x="-2.75" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="47" x="-3.25" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="48" x="-3.75" y="6" dx="1.2" dy="0.24" layer="1" rot="R270"/> +<smd name="49" x="-6" y="3.75" dx="1.2" dy="0.24" layer="1"/> +<smd name="50" x="-6" y="3.25" dx="1.2" dy="0.24" layer="1"/> +<smd name="51" x="-6" y="2.75" dx="1.2" dy="0.24" layer="1"/> +<smd name="52" x="-6" y="2.25" dx="1.2" dy="0.24" layer="1"/> +<smd name="53" x="-6" y="1.75" dx="1.2" dy="0.24" layer="1"/> +<smd name="54" x="-6" y="1.25" dx="1.2" dy="0.24" layer="1"/> +<smd name="55" x="-6" y="0.75" dx="1.2" dy="0.24" layer="1"/> +<smd name="56" x="-6" y="0.25" dx="1.2" dy="0.24" layer="1"/> +<smd name="57" x="-6" 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+</technologies> +</device> +<device name="/90" package="1X14/90"> +<connects> +<connect gate="A" pin="1" pad="1"/> +<connect gate="A" pin="10" pad="10"/> +<connect gate="A" pin="11" pad="11"/> +<connect gate="A" pin="12" pad="12"/> +<connect gate="A" pin="13" pad="13"/> +<connect gate="A" pin="14" pad="14"/> +<connect gate="A" pin="2" pad="2"/> +<connect gate="A" pin="3" pad="3"/> +<connect gate="A" pin="4" pad="4"/> +<connect gate="A" pin="5" pad="5"/> +<connect gate="A" pin="6" pad="6"/> +<connect gate="A" pin="7" pad="7"/> +<connect gate="A" pin="8" pad="8"/> +<connect gate="A" pin="9" pad="9"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="PINHD-1X11" prefix="JP" uservalue="yes"> +<description><b>PIN HEADER</b></description> +<gates> +<gate name="A" symbol="PINHD11" x="0" y="0"/> +</gates> +<devices> +<device name="" package="1X11"> +<connects> +<connect gate="A" pin="1" pad="1"/> +<connect gate="A" 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device=""/> +<part name="R4" library="rcl" deviceset="R-EU_" device="R0603" value="560"/> +<part name="+3V4" library="supply1" deviceset="+3V3" device=""/> +<part name="C12B" library="rcl" deviceset="C-EU" device="C0603" value="2u2"/> +<part name="C11B" library="rcl" deviceset="C-EU" device="C0603" value="2u2"/> +<part name="GND9" library="supply1" deviceset="GND" device=""/> +<part name="R5" library="rcl" deviceset="R-EU_" device="R0603" value="560"/> +<part name="R6" library="rcl" deviceset="R-EU_" device="R0603" value="560"/> +<part name="R7" library="rcl" deviceset="R-EU_" device="R0603" value="560"/> +<part name="C13" library="rcl" deviceset="C-EU" device="C0603" value="100n"/> +<part name="U$2" library="pyboard" deviceset="KMR4TACTILE" device=""/> +<part name="U$3" library="pyboard" deviceset="KMR4TACTILE" device=""/> +<part name="GND11" library="supply1" deviceset="GND" device=""/> +<part name="U$4" library="pyboard" deviceset="MOLEX-SD-105027" device=""/> +<part name="GND12" library="supply1" deviceset="GND" device=""/> +<part name="+3V6" library="supply1" deviceset="+3V3" device=""/> +<part name="U$5" library="pyboard" deviceset="MMA7660" device=""/> +<part name="+3V8" library="supply1" deviceset="+3V3" device=""/> +<part name="GND13" library="supply1" deviceset="GND" device=""/> +<part name="GND14" library="supply1" deviceset="GND" device=""/> +<part name="+3V9" library="supply1" deviceset="+3V3" device=""/> +<part name="GND15" library="supply1" deviceset="GND" device=""/> +<part name="C14" library="rcl" deviceset="C-EU" device="C0603" value="100n"/> +<part name="C15" library="rcl" deviceset="C-EU" device="C0603" value="100n"/> +<part name="R8" library="rcl" deviceset="R-EU_" device="R0603" value="4k7"/> +<part name="R9" library="rcl" deviceset="R-EU_" device="R0603" value="4k7"/> +<part name="+3V10" library="supply1" deviceset="+3V3" device=""/> +<part name="+3V11" library="supply1" deviceset="+3V3" device=""/> +<part name="+3V12" library="supply1" deviceset="+3V3" device=""/> +<part name="GND16" library="supply1" deviceset="GND" device=""/> +<part name="+3V13" library="supply1" deviceset="+3V3" device=""/> +<part name="GND2" library="supply1" deviceset="GND" device=""/> +<part name="R10" library="rcl" deviceset="R-EU_" device="R0603" value="1k"/> +<part name="C11" library="rcl" deviceset="C-EU" device="C0603" value="12p"/> +<part name="C12" library="rcl" deviceset="C-EU" device="C0603" value="12p"/> +<part name="GND10" library="supply1" deviceset="GND" device=""/> +<part name="Q1" library="pyboard" deviceset="TXC-CRYSTAL" device="50X32" value="8MHz"/> +<part name="Q2" library="pyboard" deviceset="TXC-CRYSTAL" device="32X15" value="32.768kHz"/> +<part name="U1" library="pyboard" deviceset="MCP1802" device=""/> +<part name="C16" library="rcl" deviceset="C-EU" device="C0603" value="1u"/> +<part name="C17" library="rcl" deviceset="C-EU" device="C0603" value="1u"/> +<part name="GND17" library="supply1" deviceset="GND" device=""/> +<part name="GND18" library="supply1" deviceset="GND" device=""/> +<part name="+3V7" library="supply1" deviceset="+3V3" device=""/> +<part name="GND19" library="supply1" deviceset="GND" device=""/> +<part name="D1" library="pyboard" deviceset="1N5819" device=""/> +<part name="R11" library="rcl" deviceset="R-EU_" device="R0603" value="1k"/> +<part name="R12" library="rcl" deviceset="R-EU_" device="R0603" value="100k"/> +<part name="R13" library="rcl" deviceset="R-EU_" device="R0603" value="10M"/> +<part name="R14" library="rcl" deviceset="R-EU_" device="R0603" value="100k"/> +<part name="R15" library="rcl" deviceset="R-EU_" device="R0603" value="100k"/> +<part name="GND20" library="supply1" deviceset="GND" device=""/> +<part name="U$1" library="pyboard" deviceset="LTST-C195KGJRKT" device=""/> +<part name="U$6" library="pyboard" deviceset="LTST-C195KGJRKT" device=""/> +<part name="U$7" library="pyboard" deviceset="USB-MICRO-AB" device=""/> +<part name="JBL" library="pinhead" deviceset="PINHD-1X1" device="" value="1"/> +<part name="JBR4" library="pinhead" deviceset="PINHD-1X1" device="" value="1"/> +<part name="JPOW" library="pinhead" deviceset="PINHD-2X4" device="" value="8"/> +<part name="JBOT" library="pinhead" deviceset="PINHD-1X8" device="" value="8"/> +<part name="JBR3" library="pinhead" deviceset="PINHD-1X1" device="" value="1"/> +<part name="JBR2" library="pinhead" deviceset="PINHD-1X1" device="" value="1"/> +<part name="JBR1" library="pinhead" deviceset="PINHD-1X1" device="" value="1"/> +<part name="JLEFT" library="pinhead" deviceset="PINHD-1X14" device="" value="14"/> +<part name="JRIGHT" library="pinhead" deviceset="PINHD-1X11" device="" value="11"/> +<part name="GND21" library="supply1" deviceset="GND" device=""/> +<part name="R16" library="rcl" deviceset="R-EU_" device="R0603" value="0"/> +<part name="R17" library="rcl" deviceset="R-EU_" device="R0603" value="10k"/> +<part name="R18" library="rcl" deviceset="R-EU_" device="R0805" value="0"/> +</parts> +<sheets> +<sheet> +<plain> +<text x="38.1" y="149.86" size="1.778" layer="97">Analog</text> +<text x="10.16" y="-7.62" size="1.778" layer="97">DFU boot</text> +<text x="124.46" y="33.02" size="1.778" layer="97">MMA</text> +<text x="17.78" y="154.94" size="1.778" layer="97">VBAT</text> +<text x="-25.4" y="152.4" size="1.778" layer="97">VDD</text> +<text x="175.26" y="93.98" size="1.778" layer="91">R16 and R18 are unpopulated. +Used for optional USB OTG support.</text> +</plain> +<instances> +<instance part="GND1" gate="1" x="195.58" y="109.22" rot="MR0"/> +<instance part="GND3" gate="1" x="45.72" y="106.68"/> +<instance part="GND4" gate="1" x="55.88" y="106.68"/> +<instance part="+3V1" gate="G$1" x="63.5" y="149.86"/> +<instance part="IC1" gate="G$1" x="109.22" y="86.36"/> +<instance part="R1" gate="G$1" x="175.26" y="119.38" rot="MR0"/> +<instance part="R2" gate="G$1" x="182.88" y="121.92" rot="MR0"/> +<instance part="C3" gate="G$1" x="-33.02" y="139.7"/> +<instance part="+3V2" gate="G$1" x="-33.02" y="149.86"/> +<instance part="GND5" gate="1" x="-33.02" y="127"/> +<instance part="C4" gate="G$1" x="-22.86" y="139.7"/> +<instance part="C5" gate="G$1" x="-12.7" y="139.7"/> +<instance part="C6" gate="G$1" x="-2.54" y="139.7"/> +<instance part="C8" gate="G$1" x="20.32" y="139.7"/> +<instance part="C9" gate="G$1" x="33.02" y="139.7"/> +<instance part="C1" gate="G$1" x="30.48" y="96.52" rot="R90"/> +<instance part="C2" gate="G$1" x="30.48" y="88.9" rot="R90"/> +<instance part="GND6" gate="1" x="25.4" y="83.82"/> +<instance part="C10" gate="G$1" x="43.18" y="139.7"/> +<instance part="C7" gate="G$1" x="7.62" y="139.7"/> +<instance part="GND7" gate="1" x="-33.02" y="27.94"/> +<instance part="+3V3" gate="G$1" x="-15.24" y="60.96"/> +<instance part="R3" gate="G$1" x="-15.24" y="50.8" rot="MR270"/> +<instance part="GND8" gate="1" x="-15.24" y="27.94"/> +<instance part="R4" gate="G$1" x="-15.24" y="104.14" rot="MR0"/> +<instance part="+3V4" gate="G$1" x="-33.02" y="114.3"/> +<instance part="C12B" gate="G$1" x="45.72" y="116.84"/> +<instance part="C11B" gate="G$1" x="35.56" y="116.84"/> +<instance part="GND9" gate="1" x="35.56" y="106.68"/> +<instance part="R5" gate="G$1" x="-15.24" y="81.28" rot="MR0"/> +<instance part="R6" gate="G$1" x="-15.24" y="96.52" rot="MR0"/> +<instance part="R7" gate="G$1" x="-15.24" y="88.9" rot="MR0"/> +<instance part="C13" gate="G$1" x="-15.24" y="38.1"/> +<instance part="U$2" gate="G$1" x="-27.94" y="43.18"/> +<instance part="U$3" gate="G$1" x="22.86" y="43.18"/> +<instance part="GND11" gate="1" x="17.78" y="27.94"/> +<instance part="U$4" gate="G$1" x="86.36" y="15.24"/> +<instance part="GND12" gate="1" x="50.8" y="2.54" rot="MR0"/> +<instance part="+3V6" gate="G$1" x="50.8" y="27.94"/> +<instance part="U$5" gate="G$1" x="170.18" y="12.7"/> +<instance part="+3V8" gate="G$1" x="193.04" y="30.48"/> +<instance part="GND13" gate="1" x="190.5" y="2.54" rot="MR0"/> +<instance part="GND14" gate="1" x="152.4" y="2.54" rot="MR0"/> +<instance part="+3V9" gate="G$1" x="119.38" y="30.48"/> +<instance part="GND15" gate="1" x="119.38" y="7.62" rot="MR0"/> +<instance part="C14" gate="G$1" x="119.38" y="20.32"/> +<instance part="C15" gate="G$1" x="129.54" y="20.32"/> +<instance part="R8" gate="G$1" x="200.66" y="20.32" rot="MR270"/> +<instance part="R9" gate="G$1" x="205.74" y="20.32" rot="MR270"/> +<instance part="+3V10" gate="G$1" x="200.66" y="30.48"/> +<instance part="+3V11" gate="G$1" x="205.74" y="30.48"/> +<instance part="+3V12" gate="G$1" x="20.32" y="149.86"/> +<instance part="GND16" gate="1" x="20.32" y="127"/> +<instance part="+3V13" gate="G$1" x="33.02" y="149.86"/> +<instance part="GND2" gate="1" x="33.02" y="127"/> +<instance part="R10" gate="G$1" x="182.88" y="114.3" rot="MR0"/> +<instance part="C11" gate="G$1" x="30.48" y="73.66" rot="R90"/> +<instance part="C12" gate="G$1" x="30.48" y="66.04" rot="R90"/> +<instance part="GND10" gate="1" x="25.4" y="60.96"/> +<instance part="Q1" gate="Q$1" x="40.64" y="91.44" rot="R90"/> +<instance part="Q2" gate="Q$1" x="40.64" y="68.58" rot="R90"/> +<instance part="U1" gate="U$1" x="213.36" y="149.86"/> +<instance part="C16" gate="G$1" x="193.04" y="147.32"/> +<instance part="C17" gate="G$1" x="231.14" y="147.32"/> +<instance part="GND17" gate="1" x="200.66" y="139.7" rot="MR0"/> +<instance part="GND18" gate="1" x="193.04" y="139.7" rot="MR0"/> +<instance part="+3V7" gate="G$1" x="241.3" y="157.48"/> +<instance part="GND19" gate="1" x="231.14" y="137.16" rot="MR0"/> +<instance part="D1" gate="G$1" x="177.8" y="152.4"/> +<instance part="R11" gate="G$1" x="-2.54" y="20.32" rot="MR0"/> +<instance part="R12" gate="G$1" x="2.54" y="15.24" rot="MR0"/> +<instance part="R13" gate="G$1" x="-2.54" y="10.16" rot="MR0"/> +<instance part="R14" gate="G$1" x="2.54" y="5.08" rot="MR0"/> +<instance part="R15" gate="G$1" x="-2.54" y="0" rot="MR0"/> +<instance part="GND20" gate="1" x="-10.16" y="-7.62"/> +<instance part="U$1" gate="G$1" x="-25.4" y="99.06" rot="R90"/> +<instance part="U$6" gate="G$1" x="-27.94" y="83.82" rot="R90"/> +<instance part="U$7" gate="G$1" x="200.66" y="121.92" rot="MR180"/> +<instance part="JBL" gate="G$1" x="251.46" y="58.42"/> +<instance part="JBR4" gate="G$1" x="299.72" y="48.26" rot="MR0"/> +<instance part="JPOW" gate="A" x="279.4" y="63.5"/> +<instance part="JBOT" gate="A" x="269.24" y="50.8" rot="R90"/> +<instance part="JBR3" gate="G$1" x="299.72" y="55.88" rot="MR0"/> +<instance part="JBR2" gate="G$1" x="299.72" y="63.5" rot="MR0"/> +<instance part="JBR1" gate="G$1" x="299.72" y="71.12" rot="MR0"/> +<instance part="JLEFT" gate="A" x="251.46" y="93.98"/> +<instance part="JRIGHT" gate="A" x="299.72" y="96.52" rot="MR0"/> +<instance part="GND21" gate="1" x="129.54" y="7.62" rot="MR0"/> +<instance part="R16" gate="G$1" x="175.26" y="124.46" rot="MR0"/> +<instance part="R17" gate="G$1" x="40.64" y="43.18" rot="MR0"/> +<instance part="R18" gate="G$1" x="180.34" y="137.16"/> +</instances> +<busses> +</busses> +<nets> +<net name="GND" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="VSSA"/> +<pinref part="GND4" gate="1" pin="GND"/> +<wire x1="76.2" y1="109.22" x2="55.88" y2="109.22" width="0.1524" layer="91"/> +<wire x1="55.88" y1="109.22" x2="55.88" y2="127" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="VSS@63"/> +<wire x1="55.88" y1="127" x2="55.88" y2="129.54" width="0.1524" layer="91"/> +<wire x1="55.88" y1="129.54" x2="76.2" y2="129.54" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="VSS@18"/> +<wire x1="76.2" y1="127" x2="55.88" y2="127" width="0.1524" layer="91"/> +<junction x="55.88" y="127"/> +<junction x="55.88" y="109.22"/> +</segment> +<segment> +<pinref part="GND5" gate="1" pin="GND"/> +<pinref part="C6" gate="G$1" pin="2"/> +<wire x1="-2.54" y1="132.08" x2="-2.54" y2="134.62" width="0.1524" layer="91"/> +<wire x1="-12.7" y1="132.08" x2="-2.54" y2="132.08" width="0.1524" layer="91"/> +<pinref part="C5" gate="G$1" pin="2"/> +<wire x1="-12.7" y1="134.62" x2="-12.7" y2="132.08" width="0.1524" layer="91"/> +<junction x="-12.7" y="132.08"/> +<wire x1="-22.86" y1="132.08" x2="-12.7" y2="132.08" width="0.1524" layer="91"/> +<pinref part="C4" gate="G$1" pin="2"/> +<wire x1="-22.86" y1="134.62" x2="-22.86" y2="132.08" width="0.1524" layer="91"/> +<junction x="-22.86" y="132.08"/> +<pinref part="C3" gate="G$1" pin="2"/> +<wire x1="-33.02" y1="134.62" x2="-33.02" y2="132.08" width="0.1524" layer="91"/> +<wire x1="-33.02" y1="132.08" x2="-22.86" y2="132.08" width="0.1524" layer="91"/> +<junction x="-33.02" y="132.08"/> +<wire x1="-33.02" y1="132.08" x2="-33.02" y2="129.54" width="0.1524" layer="91"/> +<pinref part="C7" gate="G$1" pin="2"/> +<wire x1="-2.54" y1="132.08" x2="7.62" y2="132.08" width="0.1524" layer="91"/> +<wire x1="7.62" y1="132.08" x2="7.62" y2="134.62" width="0.1524" layer="91"/> +<junction x="-2.54" y="132.08"/> +</segment> +<segment> +<pinref part="GND16" gate="1" pin="GND"/> +<pinref part="C8" gate="G$1" pin="2"/> +<wire x1="20.32" y1="134.62" x2="20.32" y2="129.54" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C9" gate="G$1" pin="2"/> +<wire x1="33.02" y1="134.62" x2="33.02" y2="132.08" width="0.1524" layer="91"/> +<pinref part="C10" gate="G$1" pin="2"/> +<wire x1="43.18" y1="134.62" x2="43.18" y2="132.08" width="0.1524" layer="91"/> +<wire x1="43.18" y1="132.08" x2="33.02" y2="132.08" width="0.1524" layer="91"/> +<junction x="33.02" y="132.08"/> +<pinref part="GND2" gate="1" pin="GND"/> +<wire x1="33.02" y1="129.54" x2="33.02" y2="132.08" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="GND6" gate="1" pin="GND"/> +<wire x1="25.4" y1="86.36" x2="25.4" y2="88.9" width="0.1524" layer="91"/> +<pinref part="C1" gate="G$1" pin="1"/> +<wire x1="25.4" y1="88.9" x2="25.4" y2="96.52" width="0.1524" layer="91"/> +<wire x1="25.4" y1="96.52" x2="27.94" y2="96.52" width="0.1524" layer="91"/> +<pinref part="C2" gate="G$1" pin="1"/> +<wire x1="27.94" y1="88.9" x2="25.4" y2="88.9" width="0.1524" layer="91"/> +<junction x="25.4" y="88.9"/> +</segment> +<segment> +<pinref part="GND8" gate="1" pin="GND"/> +<wire x1="-15.24" y1="30.48" x2="-15.24" y2="33.02" width="0.1524" layer="91"/> +<pinref part="C13" gate="G$1" pin="2"/> +</segment> +<segment> +<pinref part="GND7" gate="1" pin="GND"/> +<wire x1="-33.02" y1="30.48" x2="-33.02" y2="40.64" width="0.1524" layer="91"/> +<pinref part="U$2" gate="G$1" pin="0@A"/> +<pinref part="U$2" gate="G$1" pin="0@B"/> +<wire x1="-33.02" y1="40.64" x2="-33.02" y2="43.18" width="0.1524" layer="91"/> +<junction x="-33.02" y="40.64"/> +</segment> +<segment> +<pinref part="GND9" gate="1" pin="GND"/> +<pinref part="C11B" gate="G$1" pin="2"/> +<wire x1="35.56" y1="109.22" x2="35.56" y2="111.76" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="U$3" gate="G$1" pin="0@B"/> +<pinref part="GND11" gate="1" pin="GND"/> +<wire x1="17.78" y1="30.48" x2="17.78" y2="40.64" width="0.1524" layer="91"/> +<pinref part="U$3" gate="G$1" pin="0@A"/> +<wire x1="17.78" y1="40.64" x2="17.78" y2="43.18" width="0.1524" layer="91"/> +<junction x="17.78" y="40.64"/> +</segment> +<segment> +<pinref part="U$4" gate="G$1" pin="VSS"/> +<wire x1="66.04" y1="12.7" x2="50.8" y2="12.7" width="0.1524" layer="91"/> +<wire x1="50.8" y1="12.7" x2="50.8" y2="5.08" width="0.1524" layer="91"/> +<pinref part="GND12" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="U$5" gate="G$1" pin="DVSS"/> +<pinref part="GND13" gate="1" pin="GND"/> +<wire x1="187.96" y1="15.24" x2="190.5" y2="15.24" width="0.1524" layer="91"/> +<wire x1="190.5" y1="15.24" x2="190.5" y2="5.08" width="0.1524" layer="91"/> +<pinref part="U$5" gate="G$1" pin="N/C@10"/> +<wire x1="187.96" y1="20.32" x2="190.5" y2="20.32" width="0.1524" layer="91"/> +<wire x1="190.5" y1="20.32" x2="190.5" y2="15.24" width="0.1524" layer="91"/> +<junction x="190.5" y="15.24"/> +</segment> +<segment> +<pinref part="U$5" gate="G$1" pin="RSRVD"/> +<pinref part="GND14" gate="1" pin="GND"/> +<wire x1="154.94" y1="20.32" x2="152.4" y2="20.32" width="0.1524" layer="91"/> +<wire x1="152.4" y1="20.32" x2="152.4" y2="17.78" width="0.1524" layer="91"/> +<pinref part="U$5" gate="G$1" pin="N/C@2"/> +<wire x1="152.4" y1="17.78" x2="152.4" y2="12.7" width="0.1524" layer="91"/> +<wire x1="152.4" y1="12.7" x2="152.4" y2="5.08" width="0.1524" layer="91"/> +<wire x1="154.94" y1="17.78" x2="152.4" y2="17.78" width="0.1524" layer="91"/> +<pinref part="U$5" gate="G$1" pin="AVSS"/> +<wire x1="154.94" y1="12.7" x2="152.4" y2="12.7" width="0.1524" layer="91"/> +<junction x="152.4" y="17.78"/> +<junction x="152.4" y="12.7"/> +</segment> +<segment> +<pinref part="C14" gate="G$1" pin="2"/> +<pinref part="GND15" gate="1" pin="GND"/> +<wire x1="119.38" y1="10.16" x2="119.38" y2="15.24" width="0.1524" layer="91"/> +</segment> +<segment> +<wire x1="248.92" y1="106.68" x2="228.6" y2="106.68" width="0.1524" layer="91"/> +<label x="228.6" y="106.68" size="1.778" layer="95"/> +<pinref part="JLEFT" gate="A" pin="2"/> +</segment> +<segment> +<pinref part="GND3" gate="1" pin="GND"/> +<wire x1="45.72" y1="109.22" x2="45.72" y2="111.76" width="0.1524" layer="91"/> +<pinref part="C12B" gate="G$1" pin="2"/> +</segment> +<segment> +<pinref part="GND10" gate="1" pin="GND"/> +<wire x1="25.4" y1="63.5" x2="25.4" y2="66.04" width="0.1524" layer="91"/> +<pinref part="C11" gate="G$1" pin="1"/> +<wire x1="25.4" y1="66.04" x2="25.4" y2="73.66" width="0.1524" layer="91"/> +<wire x1="25.4" y1="73.66" x2="27.94" y2="73.66" width="0.1524" layer="91"/> +<pinref part="C12" gate="G$1" pin="1"/> +<wire x1="27.94" y1="66.04" x2="25.4" y2="66.04" width="0.1524" layer="91"/> +<junction x="25.4" y="66.04"/> +</segment> +<segment> +<pinref part="U1" gate="U$1" pin="GND"/> +<wire x1="203.2" y1="149.86" x2="200.66" y2="149.86" width="0.1524" layer="91"/> +<wire x1="200.66" y1="149.86" x2="200.66" y2="142.24" width="0.1524" layer="91"/> +<pinref part="GND17" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="C16" gate="G$1" pin="2"/> +<pinref part="GND18" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="C17" gate="G$1" pin="2"/> +<pinref part="GND19" gate="1" pin="GND"/> +<wire x1="231.14" y1="139.7" x2="231.14" y2="142.24" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R15" gate="G$1" pin="2"/> +<wire x1="-7.62" y1="0" x2="-10.16" y2="0" width="0.1524" layer="91"/> +<pinref part="R11" gate="G$1" pin="2"/> +<wire x1="-7.62" y1="20.32" x2="-10.16" y2="20.32" width="0.1524" layer="91"/> +<wire x1="-10.16" y1="20.32" x2="-10.16" y2="15.24" width="0.1524" layer="91"/> +<pinref part="R14" gate="G$1" pin="2"/> +<wire x1="-10.16" y1="15.24" x2="-10.16" y2="10.16" width="0.1524" layer="91"/> +<wire x1="-10.16" y1="10.16" x2="-10.16" y2="5.08" width="0.1524" layer="91"/> +<wire x1="-10.16" y1="5.08" x2="-10.16" y2="0" width="0.1524" layer="91"/> +<wire x1="-10.16" y1="0" x2="-10.16" y2="-5.08" width="0.1524" layer="91"/> +<wire x1="-10.16" y1="5.08" x2="-2.54" y2="5.08" width="0.1524" layer="91"/> +<pinref part="R13" gate="G$1" pin="2"/> +<wire x1="-10.16" y1="10.16" x2="-7.62" y2="10.16" width="0.1524" layer="91"/> +<pinref part="R12" gate="G$1" pin="2"/> +<wire x1="-10.16" y1="15.24" x2="-2.54" y2="15.24" width="0.1524" layer="91"/> +<junction x="-10.16" y="15.24"/> +<junction x="-10.16" y="10.16"/> +<junction x="-10.16" y="5.08"/> +<junction x="-10.16" y="0"/> +<pinref part="GND20" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="U$7" gate="G$1" pin="GND"/> +<wire x1="198.12" y1="127" x2="195.58" y2="127" width="0.1524" layer="91"/> +<wire x1="195.58" y1="127" x2="195.58" y2="111.76" width="0.1524" layer="91"/> +<pinref part="GND1" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="JRIGHT" gate="A" pin="2"/> +<wire x1="302.26" y1="106.68" x2="322.58" y2="106.68" width="0.1524" layer="91"/> +<label x="309.88" y="106.68" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JPOW" gate="A" pin="1"/> +<wire x1="276.86" y1="68.58" x2="269.24" y2="68.58" width="0.1524" layer="91"/> +<wire x1="269.24" y1="68.58" x2="269.24" y2="66.04" width="0.1524" layer="91"/> +<pinref part="JPOW" gate="A" pin="7"/> +<wire x1="269.24" y1="66.04" x2="269.24" y2="63.5" width="0.1524" layer="91"/> +<wire x1="269.24" y1="63.5" x2="269.24" y2="60.96" width="0.1524" layer="91"/> +<wire x1="269.24" y1="60.96" x2="269.24" y2="55.88" width="0.1524" layer="91"/> +<wire x1="276.86" y1="60.96" x2="269.24" y2="60.96" width="0.1524" layer="91"/> +<pinref part="JPOW" gate="A" pin="5"/> +<wire x1="276.86" y1="63.5" x2="269.24" y2="63.5" width="0.1524" layer="91"/> +<pinref part="JPOW" gate="A" pin="3"/> +<wire x1="276.86" y1="66.04" x2="269.24" y2="66.04" width="0.1524" layer="91"/> +<label x="269.24" y="55.88" size="1.778" layer="95" rot="R90"/> +<junction x="269.24" y="60.96"/> +<junction x="269.24" y="63.5"/> +<junction x="269.24" y="66.04"/> +</segment> +<segment> +<pinref part="C15" gate="G$1" pin="2"/> +<wire x1="129.54" y1="15.24" x2="129.54" y2="10.16" width="0.1524" layer="91"/> +<pinref part="GND21" gate="1" pin="GND"/> +</segment> +</net> +<net name="+3V3" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="VDDA"/> +<wire x1="76.2" y1="111.76" x2="63.5" y2="111.76" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="VBAT"/> +<wire x1="76.2" y1="114.3" x2="63.5" y2="114.3" width="0.1524" layer="91"/> +<wire x1="63.5" y1="111.76" x2="63.5" y2="114.3" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="VDD@19"/> +<wire x1="76.2" y1="134.62" x2="63.5" y2="134.62" width="0.1524" layer="91"/> +<wire x1="63.5" y1="114.3" x2="63.5" y2="134.62" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="VDD@32"/> +<wire x1="76.2" y1="137.16" x2="63.5" y2="137.16" width="0.1524" layer="91"/> +<wire x1="63.5" y1="134.62" x2="63.5" y2="137.16" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="VDD@48"/> +<wire x1="76.2" y1="139.7" x2="63.5" y2="139.7" width="0.1524" layer="91"/> +<wire x1="63.5" y1="137.16" x2="63.5" y2="139.7" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="VDD@64"/> +<wire x1="76.2" y1="142.24" x2="63.5" y2="142.24" width="0.1524" layer="91"/> +<wire x1="63.5" y1="139.7" x2="63.5" y2="142.24" width="0.1524" layer="91"/> +<pinref part="+3V1" gate="G$1" pin="+3V3"/> +<wire x1="63.5" y1="142.24" x2="63.5" y2="147.32" width="0.1524" layer="91"/> +<junction x="63.5" y="142.24"/> +<junction x="63.5" y="139.7"/> +<junction x="63.5" y="137.16"/> +<junction x="63.5" y="134.62"/> +<junction x="63.5" y="114.3"/> +</segment> +<segment> +<pinref part="C3" gate="G$1" pin="1"/> +<pinref part="+3V2" gate="G$1" pin="+3V3"/> +<wire x1="-33.02" y1="147.32" x2="-33.02" y2="144.78" width="0.1524" layer="91"/> +<pinref part="C6" gate="G$1" pin="1"/> +<wire x1="-2.54" y1="142.24" x2="-2.54" y2="144.78" width="0.1524" layer="91"/> +<wire x1="-2.54" y1="144.78" x2="-12.7" y2="144.78" width="0.1524" layer="91"/> +<pinref part="C5" gate="G$1" pin="1"/> +<wire x1="-12.7" y1="142.24" x2="-12.7" y2="144.78" width="0.1524" layer="91"/> +<junction x="-12.7" y="144.78"/> +<wire x1="-12.7" y1="144.78" x2="-22.86" y2="144.78" width="0.1524" layer="91"/> +<pinref part="C4" gate="G$1" pin="1"/> +<wire x1="-22.86" y1="142.24" x2="-22.86" y2="144.78" width="0.1524" layer="91"/> +<junction x="-22.86" y="144.78"/> +<wire x1="-22.86" y1="144.78" x2="-33.02" y2="144.78" width="0.1524" layer="91"/> +<junction x="-33.02" y="144.78"/> +<wire x1="-33.02" y1="144.78" x2="-33.02" y2="142.24" width="0.1524" layer="91"/> +<pinref part="C7" gate="G$1" pin="1"/> +<wire x1="-2.54" y1="144.78" x2="7.62" y2="144.78" width="0.1524" layer="91"/> +<wire x1="7.62" y1="144.78" x2="7.62" y2="142.24" width="0.1524" layer="91"/> +<junction x="-2.54" y="144.78"/> +</segment> +<segment> +<pinref part="C8" gate="G$1" pin="1"/> +<pinref part="+3V12" gate="G$1" pin="+3V3"/> +<wire x1="20.32" y1="147.32" x2="20.32" y2="142.24" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C9" gate="G$1" pin="1"/> +<wire x1="33.02" y1="142.24" x2="33.02" y2="144.78" width="0.1524" layer="91"/> +<wire x1="33.02" y1="144.78" x2="43.18" y2="144.78" width="0.1524" layer="91"/> +<pinref part="C10" gate="G$1" pin="1"/> +<wire x1="43.18" y1="142.24" x2="43.18" y2="144.78" width="0.1524" layer="91"/> +<junction x="33.02" y="144.78"/> +<pinref part="+3V13" gate="G$1" pin="+3V3"/> +<wire x1="33.02" y1="144.78" x2="33.02" y2="147.32" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R3" gate="G$1" pin="1"/> +<pinref part="+3V3" gate="G$1" pin="+3V3"/> +<wire x1="-15.24" y1="58.42" x2="-15.24" y2="55.88" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="+3V4" gate="G$1" pin="+3V3"/> +<wire x1="-33.02" y1="111.76" x2="-33.02" y2="104.14" width="0.1524" layer="91"/> +<wire x1="-33.02" y1="104.14" x2="-30.48" y2="104.14" width="0.1524" layer="91"/> +<pinref part="U$1" gate="G$1" pin="A1"/> +<wire x1="-33.02" y1="104.14" x2="-33.02" y2="96.52" width="0.1524" layer="91"/> +<pinref part="U$1" gate="G$1" pin="A2"/> +<wire x1="-33.02" y1="96.52" x2="-30.48" y2="96.52" width="0.1524" layer="91"/> +<wire x1="-33.02" y1="96.52" x2="-33.02" y2="88.9" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="A2"/> +<wire x1="-33.02" y1="88.9" x2="-33.02" y2="81.28" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="A1"/> +<junction x="-33.02" y="88.9"/> +<junction x="-33.02" y="96.52"/> +<junction x="-33.02" y="104.14"/> +</segment> +<segment> +<pinref part="U$4" gate="G$1" pin="VDD"/> +<wire x1="66.04" y1="17.78" x2="50.8" y2="17.78" width="0.1524" layer="91"/> +<wire x1="50.8" y1="17.78" x2="50.8" y2="25.4" width="0.1524" layer="91"/> +<pinref part="+3V6" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="U$5" gate="G$1" pin="DVDD"/> +<pinref part="+3V8" gate="G$1" pin="+3V3"/> +<wire x1="187.96" y1="17.78" x2="193.04" y2="17.78" width="0.1524" layer="91"/> +<wire x1="193.04" y1="17.78" x2="193.04" y2="27.94" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="+3V9" gate="G$1" pin="+3V3"/> +<pinref part="C14" gate="G$1" pin="1"/> +<wire x1="119.38" y1="27.94" x2="119.38" y2="22.86" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R8" gate="G$1" pin="1"/> +<pinref part="+3V10" gate="G$1" pin="+3V3"/> +<wire x1="200.66" y1="27.94" x2="200.66" y2="25.4" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R9" gate="G$1" pin="1"/> +<pinref part="+3V11" gate="G$1" pin="+3V3"/> +<wire x1="205.74" y1="27.94" x2="205.74" y2="25.4" width="0.1524" layer="91"/> +</segment> +<segment> +<wire x1="248.92" y1="109.22" x2="228.6" y2="109.22" width="0.1524" layer="91"/> +<label x="228.6" y="109.22" size="1.778" layer="95"/> +<pinref part="JLEFT" gate="A" pin="1"/> +</segment> +<segment> +<pinref part="+3V7" gate="G$1" pin="+3V3"/> +<wire x1="241.3" y1="152.4" x2="241.3" y2="154.94" width="0.1524" layer="91"/> +<pinref part="U1" gate="U$1" pin="VOUT"/> +<wire x1="223.52" y1="152.4" x2="231.14" y2="152.4" width="0.1524" layer="91"/> +<wire x1="231.14" y1="152.4" x2="231.14" y2="149.86" width="0.1524" layer="91"/> +<pinref part="C17" gate="G$1" pin="1"/> +<wire x1="231.14" y1="152.4" x2="241.3" y2="152.4" width="0.1524" layer="91"/> +<junction x="231.14" y="152.4"/> +</segment> +<segment> +<pinref part="JBL" gate="G$1" pin="1"/> +<wire x1="248.92" y1="58.42" x2="228.6" y2="58.42" width="0.1524" layer="91"/> +<label x="228.6" y="58.42" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$1" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="VCAP_2"/> +<wire x1="76.2" y1="121.92" x2="35.56" y2="121.92" width="0.1524" layer="91"/> +<pinref part="C11B" gate="G$1" pin="1"/> +<wire x1="35.56" y1="119.38" x2="35.56" y2="121.92" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$2" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="VCAP_1"/> +<wire x1="76.2" y1="119.38" x2="45.72" y2="119.38" width="0.1524" layer="91"/> +<pinref part="C12B" gate="G$1" pin="1"/> +</segment> +</net> +<net name="N$3" class="0"> +<segment> +<pinref part="R2" gate="G$1" pin="1"/> +<wire x1="198.12" y1="121.92" x2="187.96" y2="121.92" width="0.1524" layer="91"/> +<pinref part="U$7" gate="G$1" pin="D+"/> +</segment> +</net> +<net name="FS_DM" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA11"/> +<wire x1="144.78" y1="119.38" x2="170.18" y2="119.38" width="0.1524" layer="91"/> +<pinref part="R1" gate="G$1" pin="2"/> +<label x="147.32" y="119.38" size="1.778" layer="95"/> +</segment> +</net> +<net name="FS_DP" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA12"/> +<wire x1="144.78" y1="121.92" x2="177.8" y2="121.92" width="0.1524" layer="91"/> +<pinref part="R2" gate="G$1" pin="2"/> +<label x="147.32" y="121.92" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$10" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PH0"/> +<wire x1="76.2" y1="93.98" x2="48.26" y2="93.98" width="0.1524" layer="91"/> +<wire x1="48.26" y1="93.98" x2="48.26" y2="88.9" width="0.1524" layer="91"/> +<wire x1="48.26" y1="88.9" x2="40.64" y2="88.9" width="0.1524" layer="91"/> +<pinref part="C2" gate="G$1" pin="2"/> +<pinref part="Q1" gate="Q$1" pin="P$1"/> +<junction x="40.64" y="88.9"/> +<wire x1="40.64" y1="88.9" x2="35.56" y2="88.9" width="0.1524" layer="91"/> +</segment> +</net> +<net name="SDIO_CMD" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PD2"/> +<wire x1="76.2" y1="91.44" x2="60.96" y2="91.44" width="0.1524" layer="91"/> +<label x="60.96" y="91.44" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$4" gate="G$1" pin="CMD"/> +<wire x1="66.04" y1="20.32" x2="55.88" y2="20.32" width="0.1524" layer="91"/> +<label x="55.88" y="20.32" size="1.778" layer="95"/> +</segment> +</net> +<net name="SDIO_D2" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC10"/> +<wire x1="76.2" y1="68.58" x2="60.96" y2="68.58" width="0.1524" layer="91"/> +<label x="60.96" y="68.58" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$4" gate="G$1" pin="DAT2"/> +<wire x1="66.04" y1="25.4" x2="55.88" y2="25.4" width="0.1524" layer="91"/> +<label x="55.88" y="25.4" size="1.778" layer="95"/> +</segment> +</net> +<net name="SDIO_D3" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC11"/> +<wire x1="76.2" y1="71.12" x2="60.96" y2="71.12" width="0.1524" layer="91"/> +<label x="60.96" y="71.12" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$4" gate="G$1" pin="DAT3"/> +<wire x1="66.04" y1="22.86" x2="55.88" y2="22.86" width="0.1524" layer="91"/> +<label x="55.88" y="22.86" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R13" gate="G$1" pin="1"/> +<wire x1="2.54" y1="10.16" x2="20.32" y2="10.16" width="0.1524" layer="91"/> +<label x="10.16" y="10.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="SDIO_CK" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC12"/> +<wire x1="76.2" y1="73.66" x2="60.96" y2="73.66" width="0.1524" layer="91"/> +<label x="60.96" y="73.66" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$4" gate="G$1" pin="CLK"/> +<wire x1="66.04" y1="15.24" x2="55.88" y2="15.24" width="0.1524" layer="91"/> +<label x="55.88" y="15.24" size="1.778" layer="95"/> +</segment> +</net> +<net name="SDIO_D1" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC9"/> +<wire x1="76.2" y1="66.04" x2="60.96" y2="66.04" width="0.1524" layer="91"/> +<label x="60.96" y="66.04" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$4" gate="G$1" pin="DAT1"/> +<wire x1="66.04" y1="7.62" x2="55.88" y2="7.62" width="0.1524" layer="91"/> +<label x="55.88" y="7.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="SDIO_D0" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC8"/> +<wire x1="76.2" y1="63.5" x2="60.96" y2="63.5" width="0.1524" layer="91"/> +<label x="60.96" y="63.5" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$4" gate="G$1" pin="DAT0"/> +<wire x1="66.04" y1="10.16" x2="55.88" y2="10.16" width="0.1524" layer="91"/> +<label x="55.88" y="10.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="NRST" class="0"> +<segment> +<pinref part="R3" gate="G$1" pin="2"/> +<wire x1="-15.24" y1="40.64" x2="-15.24" y2="43.18" width="0.1524" layer="91"/> +<wire x1="-15.24" y1="43.18" x2="-15.24" y2="45.72" width="0.1524" layer="91"/> +<wire x1="-5.08" y1="43.18" x2="-15.24" y2="43.18" width="0.1524" layer="91"/> +<wire x1="-15.24" y1="43.18" x2="-20.32" y2="43.18" width="0.1524" layer="91"/> +<junction x="-15.24" y="43.18"/> +<label x="-10.16" y="43.18" size="1.778" layer="95"/> +<pinref part="C13" gate="G$1" pin="1"/> +<pinref part="U$2" gate="G$1" pin="1@A"/> +<pinref part="U$2" gate="G$1" pin="1@B"/> +<wire x1="-20.32" y1="40.64" x2="-20.32" y2="43.18" width="0.1524" layer="91"/> +<junction x="-20.32" y="43.18"/> +</segment> +<segment> +<pinref part="IC1" gate="G$1" pin="NRST"/> +<wire x1="76.2" y1="104.14" x2="60.96" y2="104.14" width="0.1524" layer="91"/> +<label x="60.96" y="104.14" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JBOT" gate="A" pin="2"/> +<wire x1="261.62" y1="48.26" x2="261.62" y2="30.48" width="0.1524" layer="91"/> +<label x="261.62" y="30.48" size="1.778" layer="95" rot="R90"/> +</segment> +</net> +<net name="N$11" class="0"> +<segment> +<pinref part="R4" gate="G$1" pin="2"/> +<wire x1="-22.86" y1="104.14" x2="-20.32" y2="104.14" width="0.1524" layer="91"/> +<pinref part="U$1" gate="G$1" pin="K1"/> +</segment> +</net> +<net name="N$12" class="0"> +<segment> +<pinref part="R5" gate="G$1" pin="2"/> +<wire x1="-20.32" y1="81.28" x2="-25.4" y2="81.28" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="K2"/> +</segment> +</net> +<net name="N$13" class="0"> +<segment> +<pinref part="R6" gate="G$1" pin="2"/> +<wire x1="-20.32" y1="96.52" x2="-22.86" y2="96.52" width="0.1524" layer="91"/> +<pinref part="U$1" gate="G$1" pin="K2"/> +</segment> +</net> +<net name="USR_SW" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA13"/> +<wire x1="144.78" y1="124.46" x2="160.02" y2="124.46" width="0.1524" layer="91"/> +<label x="147.32" y="124.46" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R17" gate="G$1" pin="1"/> +<wire x1="45.72" y1="43.18" x2="55.88" y2="43.18" width="0.1524" layer="91"/> +<label x="45.72" y="43.18" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="8"/> +<wire x1="248.92" y1="91.44" x2="228.6" y2="91.44" width="0.1524" layer="91"/> +<label x="228.6" y="91.44" size="1.778" layer="95"/> +</segment> +</net> +<net name="VUSB" class="0"> +<segment> +<wire x1="190.5" y1="116.84" x2="190.5" y2="137.16" width="0.1524" layer="91"/> +<label x="190.5" y="129.54" size="1.778" layer="95"/> +<pinref part="R10" gate="G$1" pin="1"/> +<wire x1="187.96" y1="114.3" x2="190.5" y2="114.3" width="0.1524" layer="91"/> +<wire x1="190.5" y1="114.3" x2="190.5" y2="116.84" width="0.1524" layer="91"/> +<junction x="190.5" y="116.84"/> +<pinref part="U$7" gate="G$1" pin="VUSB"/> +<wire x1="190.5" y1="116.84" x2="198.12" y2="116.84" width="0.1524" layer="91"/> +<pinref part="R18" gate="G$1" pin="2"/> +<wire x1="190.5" y1="137.16" x2="185.42" y2="137.16" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="D1" gate="G$1" pin="A"/> +<wire x1="175.26" y1="152.4" x2="170.18" y2="152.4" width="0.1524" layer="91"/> +<label x="170.18" y="152.4" size="1.778" layer="95"/> +</segment> +</net> +<net name="SDIO_SW" class="0"> +<segment> +<pinref part="U$4" gate="G$1" pin="SWITCH"/> +<wire x1="66.04" y1="5.08" x2="55.88" y2="5.08" width="0.1524" layer="91"/> +<label x="55.88" y="5.08" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC1" gate="G$1" pin="PC13"/> +<wire x1="76.2" y1="76.2" x2="60.96" y2="76.2" width="0.1524" layer="91"/> +<label x="60.96" y="76.2" size="1.778" layer="95"/> +</segment> +</net> +<net name="MMA_INT" class="0"> +<segment> +<pinref part="U$5" gate="G$1" pin="INT"/> +<wire x1="154.94" y1="10.16" x2="139.7" y2="10.16" width="0.1524" layer="91"/> +<label x="139.7" y="10.16" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC1" gate="G$1" pin="PB8"/> +<wire x1="144.78" y1="63.5" x2="160.02" y2="63.5" width="0.1524" layer="91"/> +<label x="147.32" y="63.5" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JBOT" gate="A" pin="3"/> +<wire x1="264.16" y1="48.26" x2="264.16" y2="30.48" width="0.1524" layer="91"/> +<label x="264.16" y="30.48" size="1.778" layer="95" rot="R90"/> +</segment> +</net> +<net name="MMA_SCL" class="0"> +<segment> +<pinref part="U$5" gate="G$1" pin="SCL"/> +<wire x1="187.96" y1="10.16" x2="205.74" y2="10.16" width="0.1524" layer="91"/> +<wire x1="205.74" y1="10.16" x2="205.74" y2="15.24" width="0.1524" layer="91"/> +<label x="208.28" y="10.16" size="1.778" layer="95"/> +<pinref part="R9" gate="G$1" pin="2"/> +<wire x1="205.74" y1="10.16" x2="220.98" y2="10.16" width="0.1524" layer="91"/> +<junction x="205.74" y="10.16"/> +</segment> +<segment> +<pinref part="IC1" gate="G$1" pin="PB6"/> +<wire x1="144.78" y1="58.42" x2="160.02" y2="58.42" width="0.1524" layer="91"/> +<label x="147.32" y="58.42" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="13"/> +<wire x1="248.92" y1="78.74" x2="228.6" y2="78.74" width="0.1524" layer="91"/> +<label x="228.6" y="78.74" size="1.778" layer="95"/> +</segment> +</net> +<net name="MMA_SDA" class="0"> +<segment> +<label x="208.28" y="12.7" size="1.778" layer="95"/> +<wire x1="187.96" y1="12.7" x2="200.66" y2="12.7" width="0.1524" layer="91"/> +<pinref part="U$5" gate="G$1" pin="SDA"/> +<pinref part="R8" gate="G$1" pin="2"/> +<wire x1="200.66" y1="12.7" x2="220.98" y2="12.7" width="0.1524" layer="91"/> +<wire x1="200.66" y1="15.24" x2="200.66" y2="12.7" width="0.1524" layer="91"/> +<junction x="200.66" y="12.7"/> +</segment> +<segment> +<pinref part="IC1" gate="G$1" pin="PB7"/> +<wire x1="144.78" y1="60.96" x2="160.02" y2="60.96" width="0.1524" layer="91"/> +<label x="147.32" y="60.96" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="14"/> +<wire x1="248.92" y1="76.2" x2="228.6" y2="76.2" width="0.1524" layer="91"/> +<label x="228.6" y="76.2" size="1.778" layer="95"/> +</segment> +</net> +<net name="IO_PC3" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC3"/> +<wire x1="76.2" y1="50.8" x2="60.96" y2="50.8" width="0.1524" layer="91"/> +<label x="60.96" y="50.8" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JBOT" gate="A" pin="8"/> +<wire x1="276.86" y1="48.26" x2="276.86" y2="30.48" width="0.1524" layer="91"/> +<label x="276.86" y="30.48" size="1.778" layer="95" rot="R90"/> +</segment> +</net> +<net name="IO_PC2" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC2"/> +<wire x1="76.2" y1="48.26" x2="60.96" y2="48.26" width="0.1524" layer="91"/> +<label x="60.96" y="48.26" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JBOT" gate="A" pin="7"/> +<wire x1="274.32" y1="48.26" x2="274.32" y2="30.48" width="0.1524" layer="91"/> +<label x="274.32" y="30.48" size="1.778" layer="95" rot="R90"/> +</segment> +</net> +<net name="IO_PC1" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC1"/> +<wire x1="76.2" y1="45.72" x2="60.96" y2="45.72" width="0.1524" layer="91"/> +<label x="60.96" y="45.72" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JBOT" gate="A" pin="6"/> +<wire x1="271.78" y1="48.26" x2="271.78" y2="30.48" width="0.1524" layer="91"/> +<label x="271.78" y="30.48" size="1.778" layer="95" rot="R90"/> +</segment> +</net> +<net name="IO_PC0" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC0"/> +<wire x1="76.2" y1="43.18" x2="60.96" y2="43.18" width="0.1524" layer="91"/> +<label x="60.96" y="43.18" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JBOT" gate="A" pin="5"/> +<wire x1="269.24" y1="48.26" x2="269.24" y2="30.48" width="0.1524" layer="91"/> +<label x="269.24" y="30.48" size="1.778" layer="95" rot="R90"/> +</segment> +</net> +<net name="IO_PA4" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA4"/> +<wire x1="144.78" y1="101.6" x2="160.02" y2="101.6" width="0.1524" layer="91"/> +<label x="147.32" y="101.6" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="83.82" x2="322.58" y2="83.82" width="0.1524" layer="91"/> +<label x="309.88" y="83.82" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="11"/> +</segment> +</net> +<net name="IO_PA5" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA5"/> +<wire x1="144.78" y1="104.14" x2="160.02" y2="104.14" width="0.1524" layer="91"/> +<label x="147.32" y="104.14" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="86.36" x2="322.58" y2="86.36" width="0.1524" layer="91"/> +<label x="309.88" y="86.36" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="10"/> +</segment> +</net> +<net name="IO_PB11" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB11"/> +<wire x1="144.78" y1="71.12" x2="160.02" y2="71.12" width="0.1524" layer="91"/> +<label x="147.32" y="71.12" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="101.6" x2="322.58" y2="101.6" width="0.1524" layer="91"/> +<label x="309.88" y="101.6" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="4"/> +</segment> +<segment> +<pinref part="R12" gate="G$1" pin="1"/> +<wire x1="7.62" y1="15.24" x2="20.32" y2="15.24" width="0.1524" layer="91"/> +<label x="10.16" y="15.24" size="1.778" layer="95"/> +</segment> +</net> +<net name="IO_PB3" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB3"/> +<wire x1="144.78" y1="50.8" x2="160.02" y2="50.8" width="0.1524" layer="91"/> +<label x="147.32" y="50.8" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="11"/> +<wire x1="248.92" y1="83.82" x2="228.6" y2="83.82" width="0.1524" layer="91"/> +<label x="228.6" y="83.82" size="1.778" layer="95"/> +</segment> +</net> +<net name="IO_PB4" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB4"/> +<wire x1="144.78" y1="53.34" x2="160.02" y2="53.34" width="0.1524" layer="91"/> +<label x="147.32" y="53.34" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="12"/> +<wire x1="248.92" y1="81.28" x2="228.6" y2="81.28" width="0.1524" layer="91"/> +<label x="228.6" y="81.28" size="1.778" layer="95"/> +</segment> +</net> +<net name="IO_PB2" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB2"/> +<wire x1="144.78" y1="48.26" x2="160.02" y2="48.26" width="0.1524" layer="91"/> +<label x="147.32" y="48.26" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R11" gate="G$1" pin="1"/> +<wire x1="2.54" y1="20.32" x2="20.32" y2="20.32" width="0.1524" layer="91"/> +<label x="10.16" y="20.32" size="1.778" layer="95"/> +</segment> +</net> +<net name="BOOT0" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="BOOT0"/> +<wire x1="76.2" y1="101.6" x2="60.96" y2="101.6" width="0.1524" layer="91"/> +<label x="60.96" y="101.6" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R15" gate="G$1" pin="1"/> +<wire x1="2.54" y1="0" x2="20.32" y2="0" width="0.1524" layer="91"/> +<label x="10.16" y="0" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JBOT" gate="A" pin="1"/> +<wire x1="259.08" y1="48.26" x2="259.08" y2="30.48" width="0.1524" layer="91"/> +<label x="259.08" y="30.48" size="1.778" layer="95" rot="R90"/> +</segment> +</net> +<net name="IO_PB10" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB10"/> +<wire x1="144.78" y1="68.58" x2="160.02" y2="68.58" width="0.1524" layer="91"/> +<label x="147.32" y="68.58" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="99.06" x2="322.58" y2="99.06" width="0.1524" layer="91"/> +<label x="309.88" y="99.06" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="5"/> +</segment> +</net> +<net name="IO_PB1" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB1"/> +<wire x1="144.78" y1="45.72" x2="160.02" y2="45.72" width="0.1524" layer="91"/> +<label x="147.32" y="45.72" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="96.52" x2="322.58" y2="96.52" width="0.1524" layer="91"/> +<label x="309.88" y="96.52" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="6"/> +</segment> +</net> +<net name="IO_PB0" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB0"/> +<wire x1="144.78" y1="43.18" x2="160.02" y2="43.18" width="0.1524" layer="91"/> +<label x="147.32" y="43.18" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="93.98" x2="322.58" y2="93.98" width="0.1524" layer="91"/> +<label x="309.88" y="93.98" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="7"/> +</segment> +</net> +<net name="IO_PB12" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB12"/> +<wire x1="144.78" y1="73.66" x2="160.02" y2="73.66" width="0.1524" layer="91"/> +<label x="147.32" y="73.66" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="104.14" x2="322.58" y2="104.14" width="0.1524" layer="91"/> +<label x="309.88" y="104.14" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="3"/> +</segment> +</net> +<net name="IO_PB13" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB13"/> +<wire x1="144.78" y1="76.2" x2="160.02" y2="76.2" width="0.1524" layer="91"/> +<label x="147.32" y="76.2" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="248.92" y1="104.14" x2="228.6" y2="104.14" width="0.1524" layer="91"/> +<label x="228.6" y="104.14" size="1.778" layer="95"/> +<pinref part="JLEFT" gate="A" pin="3"/> +</segment> +</net> +<net name="IO_PB14" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB14"/> +<wire x1="144.78" y1="78.74" x2="160.02" y2="78.74" width="0.1524" layer="91"/> +<label x="147.32" y="78.74" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="248.92" y1="101.6" x2="228.6" y2="101.6" width="0.1524" layer="91"/> +<label x="228.6" y="101.6" size="1.778" layer="95"/> +<pinref part="JLEFT" gate="A" pin="4"/> +</segment> +</net> +<net name="IO_PB15" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB15"/> +<wire x1="144.78" y1="81.28" x2="160.02" y2="81.28" width="0.1524" layer="91"/> +<label x="147.32" y="81.28" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="248.92" y1="99.06" x2="228.6" y2="99.06" width="0.1524" layer="91"/> +<label x="228.6" y="99.06" size="1.778" layer="95"/> +<pinref part="JLEFT" gate="A" pin="5"/> +</segment> +</net> +<net name="IO_PA0" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA0"/> +<wire x1="144.78" y1="91.44" x2="160.02" y2="91.44" width="0.1524" layer="91"/> +<label x="147.32" y="91.44" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="48.26" x2="322.58" y2="48.26" width="0.1524" layer="91"/> +<label x="309.88" y="48.26" size="1.778" layer="95"/> +<pinref part="JBR4" gate="G$1" pin="1"/> +</segment> +</net> +<net name="IO_PA1" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA1"/> +<wire x1="144.78" y1="93.98" x2="160.02" y2="93.98" width="0.1524" layer="91"/> +<label x="147.32" y="93.98" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="55.88" x2="322.58" y2="55.88" width="0.1524" layer="91"/> +<label x="309.88" y="55.88" size="1.778" layer="95"/> +<pinref part="JBR3" gate="G$1" pin="1"/> +</segment> +</net> +<net name="IO_PA2" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA2"/> +<wire x1="144.78" y1="96.52" x2="160.02" y2="96.52" width="0.1524" layer="91"/> +<label x="147.32" y="96.52" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="63.5" x2="322.58" y2="63.5" width="0.1524" layer="91"/> +<label x="309.88" y="63.5" size="1.778" layer="95"/> +<pinref part="JBR2" gate="G$1" pin="1"/> +</segment> +</net> +<net name="IO_PA3" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA3"/> +<wire x1="144.78" y1="99.06" x2="160.02" y2="99.06" width="0.1524" layer="91"/> +<label x="147.32" y="99.06" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="71.12" x2="322.58" y2="71.12" width="0.1524" layer="91"/> +<label x="309.88" y="71.12" size="1.778" layer="95"/> +<pinref part="JBR1" gate="G$1" pin="1"/> +</segment> +</net> +<net name="IO_PA6" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA6"/> +<wire x1="144.78" y1="106.68" x2="160.02" y2="106.68" width="0.1524" layer="91"/> +<label x="147.32" y="106.68" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="88.9" x2="322.58" y2="88.9" width="0.1524" layer="91"/> +<label x="309.88" y="88.9" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="9"/> +</segment> +</net> +<net name="IO_PA7" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA7"/> +<wire x1="144.78" y1="109.22" x2="160.02" y2="109.22" width="0.1524" layer="91"/> +<label x="147.32" y="109.22" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="302.26" y1="91.44" x2="322.58" y2="91.44" width="0.1524" layer="91"/> +<label x="309.88" y="91.44" size="1.778" layer="95"/> +<pinref part="JRIGHT" gate="A" pin="8"/> +</segment> +</net> +<net name="IO_PA14" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA14"/> +<wire x1="144.78" y1="127" x2="160.02" y2="127" width="0.1524" layer="91"/> +<label x="147.32" y="127" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="9"/> +<wire x1="248.92" y1="88.9" x2="228.6" y2="88.9" width="0.1524" layer="91"/> +<label x="228.6" y="88.9" size="1.778" layer="95"/> +</segment> +</net> +<net name="IO_PA15" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA15"/> +<wire x1="144.78" y1="129.54" x2="160.02" y2="129.54" width="0.1524" layer="91"/> +<label x="147.32" y="129.54" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="10"/> +<wire x1="248.92" y1="86.36" x2="228.6" y2="86.36" width="0.1524" layer="91"/> +<label x="228.6" y="86.36" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$5" class="0"> +<segment> +<pinref part="C12" gate="G$1" pin="2"/> +<pinref part="IC1" gate="G$1" pin="PC14"/> +<wire x1="76.2" y1="78.74" x2="45.72" y2="78.74" width="0.1524" layer="91"/> +<wire x1="45.72" y1="78.74" x2="45.72" y2="66.04" width="0.1524" layer="91"/> +<wire x1="45.72" y1="66.04" x2="40.64" y2="66.04" width="0.1524" layer="91"/> +<pinref part="Q2" gate="Q$1" pin="P$1"/> +<junction x="40.64" y="66.04"/> +<wire x1="40.64" y1="66.04" x2="35.56" y2="66.04" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$6" class="0"> +<segment> +<pinref part="C11" gate="G$1" pin="2"/> +<wire x1="35.56" y1="73.66" x2="40.64" y2="73.66" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="PC15"/> +<wire x1="76.2" y1="81.28" x2="40.64" y2="81.28" width="0.1524" layer="91"/> +<wire x1="40.64" y1="81.28" x2="40.64" y2="73.66" width="0.1524" layer="91"/> +<pinref part="Q2" gate="Q$1" pin="P$2"/> +<junction x="40.64" y="73.66"/> +</segment> +</net> +<net name="MMA_AVDD" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB5"/> +<wire x1="144.78" y1="55.88" x2="160.02" y2="55.88" width="0.1524" layer="91"/> +<label x="147.32" y="55.88" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$5" gate="G$1" pin="AVDD"/> +<wire x1="154.94" y1="15.24" x2="149.86" y2="15.24" width="0.1524" layer="91"/> +<wire x1="149.86" y1="15.24" x2="149.86" y2="27.94" width="0.1524" layer="91"/> +<label x="149.86" y="25.4" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R14" gate="G$1" pin="1"/> +<wire x1="7.62" y1="5.08" x2="20.32" y2="5.08" width="0.1524" layer="91"/> +<label x="10.16" y="5.08" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="C15" gate="G$1" pin="1"/> +<wire x1="129.54" y1="30.48" x2="129.54" y2="22.86" width="0.1524" layer="91"/> +<label x="129.54" y="27.94" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$9" class="0"> +<segment> +<pinref part="C1" gate="G$1" pin="2"/> +<pinref part="Q1" gate="Q$1" pin="P$2"/> +<wire x1="35.56" y1="96.52" x2="40.64" y2="96.52" width="0.1524" layer="91"/> +<pinref part="IC1" gate="G$1" pin="PH1"/> +<wire x1="40.64" y1="96.52" x2="76.2" y2="96.52" width="0.1524" layer="91"/> +<junction x="40.64" y="96.52"/> +</segment> +</net> +<net name="VIN" class="0"> +<segment> +<pinref part="U1" gate="U$1" pin="VIN"/> +<wire x1="203.2" y1="152.4" x2="198.12" y2="152.4" width="0.1524" layer="91"/> +<pinref part="U1" gate="U$1" pin="EN"/> +<wire x1="203.2" y1="147.32" x2="198.12" y2="147.32" width="0.1524" layer="91"/> +<wire x1="198.12" y1="147.32" x2="198.12" y2="152.4" width="0.1524" layer="91"/> +<wire x1="185.42" y1="152.4" x2="182.88" y2="152.4" width="0.1524" layer="91"/> +<wire x1="185.42" y1="152.4" x2="185.42" y2="147.32" width="0.1524" layer="91"/> +<wire x1="185.42" y1="147.32" x2="170.18" y2="147.32" width="0.1524" layer="91"/> +<label x="170.18" y="147.32" size="1.778" layer="95"/> +<wire x1="185.42" y1="152.4" x2="193.04" y2="152.4" width="0.1524" layer="91"/> +<wire x1="198.12" y1="152.4" x2="193.04" y2="152.4" width="0.1524" layer="91"/> +<pinref part="C16" gate="G$1" pin="1"/> +<wire x1="193.04" y1="152.4" x2="193.04" y2="149.86" width="0.1524" layer="91"/> +<junction x="193.04" y="152.4"/> +<junction x="198.12" y="152.4"/> +<junction x="185.42" y="152.4"/> +<pinref part="D1" gate="G$1" pin="K"/> +</segment> +<segment> +<pinref part="JRIGHT" gate="A" pin="1"/> +<wire x1="302.26" y1="109.22" x2="322.58" y2="109.22" width="0.1524" layer="91"/> +<label x="309.88" y="109.22" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JPOW" gate="A" pin="8"/> +<wire x1="284.48" y1="60.96" x2="292.1" y2="60.96" width="0.1524" layer="91"/> +<wire x1="292.1" y1="60.96" x2="292.1" y2="63.5" width="0.1524" layer="91"/> +<pinref part="JPOW" gate="A" pin="2"/> +<wire x1="292.1" y1="63.5" x2="292.1" y2="66.04" width="0.1524" layer="91"/> +<wire x1="292.1" y1="66.04" x2="292.1" y2="68.58" width="0.1524" layer="91"/> +<wire x1="292.1" y1="68.58" x2="292.1" y2="73.66" width="0.1524" layer="91"/> +<wire x1="284.48" y1="68.58" x2="292.1" y2="68.58" width="0.1524" layer="91"/> +<pinref part="JPOW" gate="A" pin="4"/> +<wire x1="284.48" y1="66.04" x2="292.1" y2="66.04" width="0.1524" layer="91"/> +<pinref part="JPOW" gate="A" pin="6"/> +<wire x1="284.48" y1="63.5" x2="292.1" y2="63.5" width="0.1524" layer="91"/> +<label x="292.1" y="73.66" size="1.778" layer="95" rot="R270"/> +<junction x="292.1" y="63.5"/> +<junction x="292.1" y="66.04"/> +<junction x="292.1" y="68.58"/> +</segment> +<segment> +<pinref part="R18" gate="G$1" pin="1"/> +<wire x1="175.26" y1="137.16" x2="170.18" y2="137.16" width="0.1524" layer="91"/> +<label x="170.18" y="137.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$14" class="0"> +<segment> +<pinref part="U$6" gate="G$1" pin="K1"/> +<pinref part="R7" gate="G$1" pin="2"/> +<wire x1="-20.32" y1="88.9" x2="-25.4" y2="88.9" width="0.1524" layer="91"/> +</segment> +</net> +<net name="LEDG1" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC4"/> +<wire x1="76.2" y1="53.34" x2="60.96" y2="53.34" width="0.1524" layer="91"/> +<label x="60.96" y="53.34" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R4" gate="G$1" pin="1"/> +<wire x1="-10.16" y1="104.14" x2="7.62" y2="104.14" width="0.1524" layer="91"/> +<label x="2.54" y="104.14" size="1.778" layer="95"/> +</segment> +</net> +<net name="LEDG2" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC5"/> +<wire x1="76.2" y1="55.88" x2="60.96" y2="55.88" width="0.1524" layer="91"/> +<label x="60.96" y="55.88" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R7" gate="G$1" pin="1"/> +<wire x1="-10.16" y1="88.9" x2="7.62" y2="88.9" width="0.1524" layer="91"/> +<label x="2.54" y="88.9" size="1.778" layer="95"/> +</segment> +</net> +<net name="IO_PC6" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC6"/> +<wire x1="76.2" y1="58.42" x2="60.96" y2="58.42" width="0.1524" layer="91"/> +<label x="60.96" y="58.42" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="6"/> +<wire x1="248.92" y1="96.52" x2="228.6" y2="96.52" width="0.1524" layer="91"/> +<label x="228.6" y="96.52" size="1.778" layer="95"/> +</segment> +</net> +<net name="IO_PC7" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PC7"/> +<wire x1="76.2" y1="60.96" x2="60.96" y2="60.96" width="0.1524" layer="91"/> +<label x="60.96" y="60.96" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JLEFT" gate="A" pin="7"/> +<wire x1="248.92" y1="93.98" x2="228.6" y2="93.98" width="0.1524" layer="91"/> +<label x="228.6" y="93.98" size="1.778" layer="95"/> +</segment> +</net> +<net name="LEDR1" class="0"> +<segment> +<pinref part="R6" gate="G$1" pin="1"/> +<wire x1="-10.16" y1="96.52" x2="7.62" y2="96.52" width="0.1524" layer="91"/> +<label x="2.54" y="96.52" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC1" gate="G$1" pin="PA8"/> +<wire x1="144.78" y1="111.76" x2="160.02" y2="111.76" width="0.1524" layer="91"/> +<label x="147.32" y="111.76" size="1.778" layer="95"/> +</segment> +</net> +<net name="FS_VUSB" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA9"/> +<wire x1="144.78" y1="114.3" x2="177.8" y2="114.3" width="0.1524" layer="91"/> +<label x="147.32" y="114.3" size="1.778" layer="95"/> +<pinref part="R10" gate="G$1" pin="2"/> +</segment> +</net> +<net name="LEDR2" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PA10"/> +<wire x1="144.78" y1="116.84" x2="167.64" y2="116.84" width="0.1524" layer="91"/> +<label x="147.32" y="116.84" size="1.778" layer="95"/> +<wire x1="167.64" y1="116.84" x2="167.64" y2="124.46" width="0.1524" layer="91"/> +<pinref part="R16" gate="G$1" pin="2"/> +<wire x1="167.64" y1="124.46" x2="170.18" y2="124.46" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R5" gate="G$1" pin="1"/> +<wire x1="-10.16" y1="81.28" x2="7.62" y2="81.28" width="0.1524" layer="91"/> +<label x="2.54" y="81.28" size="1.778" layer="95"/> +</segment> +</net> +<net name="IO_PB9" class="0"> +<segment> +<pinref part="IC1" gate="G$1" pin="PB9"/> +<wire x1="144.78" y1="66.04" x2="160.02" y2="66.04" width="0.1524" layer="91"/> +<label x="147.32" y="66.04" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JBOT" gate="A" pin="4"/> +<wire x1="266.7" y1="48.26" x2="266.7" y2="30.48" width="0.1524" layer="91"/> +<label x="266.7" y="30.48" size="1.778" layer="95" rot="R90"/> +</segment> +</net> +<net name="N$4" class="0"> +<segment> +<pinref part="R1" gate="G$1" pin="1"/> +<pinref part="U$7" gate="G$1" pin="D-"/> +<wire x1="180.34" y1="119.38" x2="198.12" y2="119.38" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$7" class="0"> +<segment> +<pinref part="R16" gate="G$1" pin="1"/> +<pinref part="U$7" gate="G$1" pin="ID"/> +<wire x1="180.34" y1="124.46" x2="198.12" y2="124.46" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$15" class="0"> +<segment> +<pinref part="U$3" gate="G$1" pin="1@B"/> +<pinref part="U$3" gate="G$1" pin="1@A"/> +<wire x1="30.48" y1="40.64" x2="30.48" y2="43.18" width="0.1524" layer="91"/> +<pinref part="R17" gate="G$1" pin="2"/> +<wire x1="30.48" y1="43.18" x2="35.56" y2="43.18" width="0.1524" layer="91"/> +<junction x="30.48" y="43.18"/> +</segment> +</net> +</nets> +</sheet> +</sheets> +</schematic> +</drawing> +<compatibility> +<note version="6.3" minversion="6.2.2" severity="warning"> +Since Version 6.2.2 text objects can contain more than one line, +which will not be processed correctly with this version. +</note> +</compatibility> +</eagle> diff --git a/pybv3/eagle/rcl.lbr b/pybv3/eagle/rcl.lbr new file mode 100644 index 000000000..080a82a04 --- /dev/null +++ b/pybv3/eagle/rcl.lbr @@ -0,0 +1,4745 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="6.5.0"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="1" unitdist="mic" unit="mic" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" 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+</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="WSC6927" package="WSC6927"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> diff --git a/pybv3/eagle/supply1.lbr b/pybv3/eagle/supply1.lbr new file mode 100644 index 000000000..cac98efc4 --- /dev/null +++ b/pybv3/eagle/supply1.lbr @@ -0,0 +1,152 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="6.5.0"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="1" unitdist="mic" unit="mic" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="16" 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visible="yes" active="yes"/> +<layer number="101" name="Patch_Top" color="7" fill="1" visible="yes" active="yes"/> +<layer number="102" name="Vscore" color="7" fill="1" visible="yes" active="yes"/> +<layer number="103" name="tMap" color="7" fill="1" visible="yes" active="yes"/> +<layer number="104" name="Name" color="7" fill="1" visible="yes" active="yes"/> +<layer number="105" name="tPlate" color="7" fill="1" visible="yes" active="yes"/> +<layer number="106" name="bPlate" color="7" fill="1" visible="yes" active="yes"/> +<layer number="107" name="Crop" color="7" fill="1" visible="yes" active="yes"/> +<layer number="108" name="tplace-old" color="7" fill="1" visible="yes" active="yes"/> +<layer number="109" name="ref-old" color="7" fill="1" visible="yes" active="yes"/> +<layer number="116" name="Patch_BOT" color="7" fill="1" visible="yes" active="yes"/> +<layer number="121" name="_tsilk" color="7" fill="1" visible="yes" active="yes"/> +<layer number="122" name="_bsilk" color="7" fill="1" visible="yes" active="yes"/> +<layer number="125" name="_tNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="144" name="Drill_legend" color="7" fill="1" visible="yes" active="yes"/> +<layer number="151" name="HeatSink" color="7" fill="1" visible="yes" active="yes"/> +<layer number="199" name="Contour" color="7" fill="1" visible="yes" active="yes"/> +<layer number="200" name="200bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="201" name="201bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="202" name="202bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="203" name="203bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="204" name="204bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="205" name="205bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="206" name="206bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="207" name="207bmp" color="7" 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fill="1" visible="yes" active="yes"/> +<layer number="220" name="220bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="221" name="221bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="222" name="222bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="223" name="223bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="224" name="224bmp" color="7" fill="1" visible="yes" active="yes"/> +<layer number="250" name="Descript" color="7" fill="1" visible="yes" active="yes"/> +<layer number="251" name="SMDround" color="7" fill="1" visible="yes" active="yes"/> +<layer number="254" name="cooling" color="7" fill="1" visible="yes" active="yes"/> +</layers> +<library> +<packages> +</packages> +<symbols> +<symbol name="+3V3"> +<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> +<pin name="+3V3" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/> +<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">>VALUE</text> +</symbol> +<symbol name="GND"> +<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/> +<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/> +<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text> +</symbol> +</symbols> +<devicesets> +<deviceset name="+3V3" prefix="+3V3"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="G$1" symbol="+3V3" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="GND" prefix="GND"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="1" symbol="GND" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> |