aboutsummaryrefslogtreecommitdiff
path: root/ports
diff options
context:
space:
mode:
authorDamien George2018-04-10 22:25:55 +1000
committerDamien George2018-04-11 14:22:21 +1000
commitb30e0d2f2683a809ae393dd402aad89a62a22df3 (patch)
tree8deb7934f0b647cf33e5e70226a7ddc9b073dc9c /ports
parentaebd9701a78d267cb264d400804b02c5b7a00e9a (diff)
stm32/dac: Add buffering argument to constructor and init() method.
This can be used to select the output buffer behaviour of the DAC. The default values are chosen to retain backwards compatibility with existing behaviour. Thanks to @peterhinch for the initial idea to add this feature.
Diffstat (limited to 'ports')
-rw-r--r--ports/stm32/dac.c24
1 files changed, 20 insertions, 4 deletions
diff --git a/ports/stm32/dac.c b/ports/stm32/dac.c
index bce30dbc7..04acfb8aa 100644
--- a/ports/stm32/dac.c
+++ b/ports/stm32/dac.c
@@ -143,11 +143,14 @@ typedef struct _pyb_dac_obj_t {
uint16_t pin; // GPIO_PIN_4 or GPIO_PIN_5
uint8_t bits; // 8 or 12
uint8_t state;
+ uint8_t outbuf_single;
+ uint8_t outbuf_waveform;
} pyb_dac_obj_t;
STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
static const mp_arg_t allowed_args[] = {
{ MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
+ { MP_QSTR_buffering, MP_ARG_KW_ONLY | MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_none_obj)} },
};
// parse args
@@ -194,6 +197,19 @@ STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, size_t n_args, const mp
mp_raise_ValueError("unsupported bits");
}
+ // set output buffer config
+ if (args[1].u_obj == mp_const_none) {
+ // due to legacy, default values differ for single and waveform outputs
+ self->outbuf_single = DAC_OUTPUTBUFFER_DISABLE;
+ self->outbuf_waveform = DAC_OUTPUTBUFFER_ENABLE;
+ } else if (mp_obj_is_true(args[1].u_obj)) {
+ self->outbuf_single = DAC_OUTPUTBUFFER_ENABLE;
+ self->outbuf_waveform = DAC_OUTPUTBUFFER_ENABLE;
+ } else {
+ self->outbuf_single = DAC_OUTPUTBUFFER_DISABLE;
+ self->outbuf_waveform = DAC_OUTPUTBUFFER_DISABLE;
+ }
+
// reset state of DAC
self->state = DAC_STATE_RESET;
@@ -289,7 +305,7 @@ STATIC mp_obj_t pyb_dac_noise(mp_obj_t self_in, mp_obj_t freq) {
// configure DAC to trigger via TIM6
DAC_ChannelConfTypeDef config;
config.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
- config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
+ config.DAC_OutputBuffer = self->outbuf_waveform;
HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel);
self->state = DAC_STATE_BUILTIN_WAVEFORM;
}
@@ -319,7 +335,7 @@ STATIC mp_obj_t pyb_dac_triangle(mp_obj_t self_in, mp_obj_t freq) {
// configure DAC to trigger via TIM6
DAC_ChannelConfTypeDef config;
config.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
- config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
+ config.DAC_OutputBuffer = self->outbuf_waveform;
HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel);
self->state = DAC_STATE_BUILTIN_WAVEFORM;
}
@@ -342,7 +358,7 @@ STATIC mp_obj_t pyb_dac_write(mp_obj_t self_in, mp_obj_t val) {
if (self->state != DAC_STATE_WRITE_SINGLE) {
DAC_ChannelConfTypeDef config;
config.DAC_Trigger = DAC_TRIGGER_NONE;
- config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE;
+ config.DAC_OutputBuffer = self->outbuf_single;
HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel);
self->state = DAC_STATE_WRITE_SINGLE;
}
@@ -454,7 +470,7 @@ mp_obj_t pyb_dac_write_timed(size_t n_args, const mp_obj_t *pos_args, mp_map_t *
if (self->state != DAC_STATE_DMA_WAVEFORM + dac_trigger) {
DAC_ChannelConfTypeDef config;
config.DAC_Trigger = dac_trigger;
- config.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
+ config.DAC_OutputBuffer = self->outbuf_waveform;
HAL_DAC_ConfigChannel(&DAC_Handle, &config, self->dac_channel);
self->state = DAC_STATE_DMA_WAVEFORM + dac_trigger;
}