diff options
| author | Damien George | 2019-10-04 16:03:37 +1000 |
|---|---|---|
| committer | Damien George | 2019-10-04 16:10:13 +1000 |
| commit | 26e90a051415629796efbec59f1d653b46e43aea (patch) | |
| tree | ee26e99207786b0c25b0ca0b90a2d3cfd4ae5f95 /ports/stm32/boards/B_L475E_IOT01A | |
| parent | 266146ad643b408a307676e320ffb22e0fe1e0ad (diff) | |
stm32/boards: Enable MICROPY_HW_RTC_USE_LSE on L4 boards.
The previous commit changed the default configuration on L4 MCUs to use
LSI, so configure these boards to use LSE again.
Diffstat (limited to 'ports/stm32/boards/B_L475E_IOT01A')
| -rw-r--r-- | ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h index 3ab3d5fa1..a88bcf675 100644 --- a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h +++ b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h @@ -12,9 +12,11 @@ #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7) #define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2) #define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV4) - #define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 +// The board has an external 32kHz crystal +#define MICROPY_HW_RTC_USE_LSE (1) + // USART1 config connected to ST-Link #define MICROPY_HW_UART1_TX (pin_B6) #define MICROPY_HW_UART1_RX (pin_B7) |