diff options
| author | Krzysztof Blazewicz | 2016-09-08 18:20:32 +0200 |
|---|---|---|
| committer | Krzysztof Blazewicz | 2016-11-16 12:43:27 +0100 |
| commit | e2b48221892ca5445d9e255753e4ccfcd07a8171 (patch) | |
| tree | 7f865da6a369603f58305133f2d61ecdc96b682b | |
| parent | 4f7c5fa64769f836b1cb3d357be4864807e10694 (diff) | |
stmhal/hal/rcc: reapply HAL commit c568a2b for f4
| -rw-r--r-- | stmhal/hal/f4/src/stm32f4xx_hal_rcc.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/stmhal/hal/f4/src/stm32f4xx_hal_rcc.c b/stmhal/hal/f4/src/stm32f4xx_hal_rcc.c index cbefae349..3861b5266 100644 --- a/stmhal/hal/f4/src/stm32f4xx_hal_rcc.c +++ b/stmhal/hal/f4/src/stm32f4xx_hal_rcc.c @@ -893,7 +893,12 @@ __weak uint32_t HAL_RCC_GetSysClockFreq(void) if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
{
/* HSE used as PLL clock source */
- pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
+ //pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
+ // dpgeorge: Adjust the way the arithmetic is done so it retains
+ // precision for the case that pllm doesn't evenly divide HSE_VALUE.
+ // Must be sure not to overflow, so divide by 4 first. HSE_VALUE
+ // should be a multiple of 4 (being a multiple of 100 is enough).
+ pllvco = ((HSE_VALUE / 4) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN))) / pllm * 4;
}
else
{
|