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authorDamien George2018-12-07 18:36:43 +1100
committerDamien George2018-12-10 16:21:50 +1100
commita2271532beb0c1c3e289d685ecccb949425645b4 (patch)
tree89ad929e97f9406d9a268e7a0743933253eb7ed9
parent55830dd9bf4fee87c0a6d3f38c51614fea0eb483 (diff)
stm32: Split out UART Python bindings from uart.c to machine_uart.c.
-rw-r--r--ports/stm32/Makefile1
-rw-r--r--ports/stm32/machine_uart.c596
-rw-r--r--ports/stm32/main.c2
-rw-r--r--ports/stm32/uart.c762
-rw-r--r--ports/stm32/uart.h29
5 files changed, 717 insertions, 673 deletions
diff --git a/ports/stm32/Makefile b/ports/stm32/Makefile
index a5adf03b6..678ece9bd 100644
--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -243,6 +243,7 @@ SRC_C = \
help.c \
machine_i2c.c \
machine_spi.c \
+ machine_uart.c \
modmachine.c \
modpyb.c \
modstm.c \
diff --git a/ports/stm32/machine_uart.c b/ports/stm32/machine_uart.c
new file mode 100644
index 000000000..8746d3bbc
--- /dev/null
+++ b/ports/stm32/machine_uart.c
@@ -0,0 +1,596 @@
+/*
+ * This file is part of the MicroPython project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2013-2018 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <stdarg.h>
+
+#include "py/runtime.h"
+#include "py/stream.h"
+#include "py/mperrno.h"
+#include "py/mphal.h"
+#include "lib/utils/interrupt_char.h"
+#include "uart.h"
+#include "irq.h"
+#include "pendsv.h"
+
+/// \moduleref pyb
+/// \class UART - duplex serial communication bus
+///
+/// UART implements the standard UART/USART duplex serial communications protocol. At
+/// the physical level it consists of 2 lines: RX and TX. The unit of communication
+/// is a character (not to be confused with a string character) which can be 8 or 9
+/// bits wide.
+///
+/// UART objects can be created and initialised using:
+///
+/// from pyb import UART
+///
+/// uart = UART(1, 9600) # init with given baudrate
+/// uart.init(9600, bits=8, parity=None, stop=1) # init with given parameters
+///
+/// Bits can be 8 or 9. Parity can be None, 0 (even) or 1 (odd). Stop can be 1 or 2.
+///
+/// A UART object acts like a stream object and reading and writing is done
+/// using the standard stream methods:
+///
+/// uart.read(10) # read 10 characters, returns a bytes object
+/// uart.read() # read all available characters
+/// uart.readline() # read a line
+/// uart.readinto(buf) # read and store into the given buffer
+/// uart.write('abc') # write the 3 characters
+///
+/// Individual characters can be read/written using:
+///
+/// uart.readchar() # read 1 character and returns it as an integer
+/// uart.writechar(42) # write 1 character
+///
+/// To check if there is anything to be read, use:
+///
+/// uart.any() # returns True if any characters waiting
+
+STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+ if (!self->is_enabled) {
+ mp_printf(print, "UART(%u)", self->uart_id);
+ } else {
+ mp_int_t bits;
+ switch (self->uart.Init.WordLength) {
+ #ifdef UART_WORDLENGTH_7B
+ case UART_WORDLENGTH_7B: bits = 7; break;
+ #endif
+ case UART_WORDLENGTH_8B: bits = 8; break;
+ case UART_WORDLENGTH_9B: default: bits = 9; break;
+ }
+ if (self->uart.Init.Parity != UART_PARITY_NONE) {
+ bits -= 1;
+ }
+ mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=",
+ self->uart_id, self->uart.Init.BaudRate, bits);
+ if (self->uart.Init.Parity == UART_PARITY_NONE) {
+ mp_print_str(print, "None");
+ } else if (self->uart.Init.Parity == UART_PARITY_EVEN) {
+ mp_print_str(print, "0");
+ } else {
+ mp_print_str(print, "1");
+ }
+ mp_printf(print, ", stop=%u, flow=",
+ self->uart.Init.StopBits == UART_STOPBITS_1 ? 1 : 2);
+ if (self->uart.Init.HwFlowCtl == UART_HWCONTROL_NONE) {
+ mp_print_str(print, "0");
+ } else {
+ if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) {
+ mp_print_str(print, "RTS");
+ if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
+ mp_print_str(print, "|");
+ }
+ }
+ if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
+ mp_print_str(print, "CTS");
+ }
+ }
+ mp_printf(print, ", timeout=%u, timeout_char=%u, rxbuf=%u)",
+ self->timeout, self->timeout_char,
+ self->read_buf_len == 0 ? 0 : self->read_buf_len - 1); // -1 to adjust for usable length of buffer
+ }
+}
+
+/// \method init(baudrate, bits=8, parity=None, stop=1, *, timeout=1000, timeout_char=0, flow=0, read_buf_len=64)
+///
+/// Initialise the UART bus with the given parameters:
+///
+/// - `baudrate` is the clock rate.
+/// - `bits` is the number of bits per byte, 7, 8 or 9.
+/// - `parity` is the parity, `None`, 0 (even) or 1 (odd).
+/// - `stop` is the number of stop bits, 1 or 2.
+/// - `timeout` is the timeout in milliseconds to wait for the first character.
+/// - `timeout_char` is the timeout in milliseconds to wait between characters.
+/// - `flow` is RTS | CTS where RTS == 256, CTS == 512
+/// - `read_buf_len` is the character length of the read buffer (0 to disable).
+STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
+ static const mp_arg_t allowed_args[] = {
+ { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} },
+ { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
+ { MP_QSTR_parity, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_none_obj)} },
+ { MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} },
+ { MP_QSTR_flow, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_HWCONTROL_NONE} },
+ { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} },
+ { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
+ { MP_QSTR_rxbuf, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
+ { MP_QSTR_read_buf_len, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, // legacy
+ };
+
+ // parse args
+ struct {
+ mp_arg_val_t baudrate, bits, parity, stop, flow, timeout, timeout_char, rxbuf, read_buf_len;
+ } args;
+ mp_arg_parse_all(n_args, pos_args, kw_args,
+ MP_ARRAY_SIZE(allowed_args), allowed_args, (mp_arg_val_t*)&args);
+
+ // set the UART configuration values
+ memset(&self->uart, 0, sizeof(self->uart));
+ UART_InitTypeDef *init = &self->uart.Init;
+
+ // baudrate
+ init->BaudRate = args.baudrate.u_int;
+
+ // parity
+ mp_int_t bits = args.bits.u_int;
+ if (args.parity.u_obj == mp_const_none) {
+ init->Parity = UART_PARITY_NONE;
+ } else {
+ mp_int_t parity = mp_obj_get_int(args.parity.u_obj);
+ init->Parity = (parity & 1) ? UART_PARITY_ODD : UART_PARITY_EVEN;
+ bits += 1; // STs convention has bits including parity
+ }
+
+ // number of bits
+ if (bits == 8) {
+ init->WordLength = UART_WORDLENGTH_8B;
+ } else if (bits == 9) {
+ init->WordLength = UART_WORDLENGTH_9B;
+ #ifdef UART_WORDLENGTH_7B
+ } else if (bits == 7) {
+ init->WordLength = UART_WORDLENGTH_7B;
+ #endif
+ } else {
+ mp_raise_ValueError("unsupported combination of bits and parity");
+ }
+
+ // stop bits
+ switch (args.stop.u_int) {
+ case 1: init->StopBits = UART_STOPBITS_1; break;
+ default: init->StopBits = UART_STOPBITS_2; break;
+ }
+
+ // flow control
+ init->HwFlowCtl = args.flow.u_int;
+
+ // extra config (not yet configurable)
+ init->Mode = UART_MODE_TX_RX;
+ init->OverSampling = UART_OVERSAMPLING_16;
+
+ // init UART (if it fails, it's because the port doesn't exist)
+ if (!uart_init2(self)) {
+ nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) doesn't exist", self->uart_id));
+ }
+
+ // set timeout
+ self->timeout = args.timeout.u_int;
+
+ // set timeout_char
+ // make sure it is at least as long as a whole character (13 bits to be safe)
+ // minimum value is 2ms because sys-tick has a resolution of only 1ms
+ self->timeout_char = args.timeout_char.u_int;
+ uint32_t min_timeout_char = 13000 / init->BaudRate + 2;
+ if (self->timeout_char < min_timeout_char) {
+ self->timeout_char = min_timeout_char;
+ }
+
+ // setup the read buffer
+ m_del(byte, self->read_buf, self->read_buf_len << self->char_width);
+ if (init->WordLength == UART_WORDLENGTH_9B && init->Parity == UART_PARITY_NONE) {
+ self->char_mask = 0x1ff;
+ self->char_width = CHAR_WIDTH_9BIT;
+ } else {
+ if (init->WordLength == UART_WORDLENGTH_9B || init->Parity == UART_PARITY_NONE) {
+ self->char_mask = 0xff;
+ } else {
+ self->char_mask = 0x7f;
+ }
+ self->char_width = CHAR_WIDTH_8BIT;
+ }
+ self->read_buf_head = 0;
+ self->read_buf_tail = 0;
+ if (args.rxbuf.u_int >= 0) {
+ // rxbuf overrides legacy read_buf_len
+ args.read_buf_len.u_int = args.rxbuf.u_int;
+ }
+ if (args.read_buf_len.u_int <= 0) {
+ // no read buffer
+ self->read_buf_len = 0;
+ self->read_buf = NULL;
+ HAL_NVIC_DisableIRQ(self->irqn);
+ __HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE);
+ } else {
+ // read buffer using interrupts
+ self->read_buf_len = args.read_buf_len.u_int + 1; // +1 to adjust for usable length of buffer
+ self->read_buf = m_new(byte, self->read_buf_len << self->char_width);
+ __HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE);
+ NVIC_SetPriority(IRQn_NONNEG(self->irqn), IRQ_PRI_UART);
+ HAL_NVIC_EnableIRQ(self->irqn);
+ }
+
+ // compute actual baudrate that was configured
+ // (this formula assumes UART_OVERSAMPLING_16)
+ uint32_t actual_baudrate = 0;
+ #if defined(STM32F0)
+ actual_baudrate = HAL_RCC_GetPCLK1Freq();
+ #elif defined(STM32F7) || defined(STM32H7)
+ UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
+ UART_GETCLOCKSOURCE(&self->uart, clocksource);
+ switch (clocksource) {
+ #if defined(STM32H7)
+ case UART_CLOCKSOURCE_D2PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
+ case UART_CLOCKSOURCE_D3PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
+ case UART_CLOCKSOURCE_D2PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break;
+ #else
+ case UART_CLOCKSOURCE_PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
+ case UART_CLOCKSOURCE_PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break;
+ case UART_CLOCKSOURCE_SYSCLK: actual_baudrate = HAL_RCC_GetSysClockFreq(); break;
+ #endif
+ #if defined(STM32H7)
+ case UART_CLOCKSOURCE_CSI: actual_baudrate = CSI_VALUE; break;
+ #endif
+ case UART_CLOCKSOURCE_HSI: actual_baudrate = HSI_VALUE; break;
+ case UART_CLOCKSOURCE_LSE: actual_baudrate = LSE_VALUE; break;
+ #if defined(STM32H7)
+ case UART_CLOCKSOURCE_PLL2:
+ case UART_CLOCKSOURCE_PLL3:
+ #endif
+ case UART_CLOCKSOURCE_UNDEFINED: break;
+ }
+ #else
+ if (self->uart.Instance == USART1
+ #if defined(USART6)
+ || self->uart.Instance == USART6
+ #endif
+ ) {
+ actual_baudrate = HAL_RCC_GetPCLK2Freq();
+ } else {
+ actual_baudrate = HAL_RCC_GetPCLK1Freq();
+ }
+ #endif
+ actual_baudrate /= self->uart.Instance->BRR;
+
+ // check we could set the baudrate within 5%
+ uint32_t baudrate_diff;
+ if (actual_baudrate > init->BaudRate) {
+ baudrate_diff = actual_baudrate - init->BaudRate;
+ } else {
+ baudrate_diff = init->BaudRate - actual_baudrate;
+ }
+ init->BaudRate = actual_baudrate; // remember actual baudrate for printing
+ if (20 * baudrate_diff > init->BaudRate) {
+ nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "set baudrate %d is not within 5%% of desired value", actual_baudrate));
+ }
+
+ return mp_const_none;
+}
+
+/// \classmethod \constructor(bus, ...)
+///
+/// Construct a UART object on the given bus. `bus` can be 1-6, or 'XA', 'XB', 'YA', or 'YB'.
+/// With no additional parameters, the UART object is created but not
+/// initialised (it has the settings from the last initialisation of
+/// the bus, if any). If extra arguments are given, the bus is initialised.
+/// See `init` for parameters of initialisation.
+///
+/// The physical pins of the UART busses are:
+///
+/// - `UART(4)` is on `XA`: `(TX, RX) = (X1, X2) = (PA0, PA1)`
+/// - `UART(1)` is on `XB`: `(TX, RX) = (X9, X10) = (PB6, PB7)`
+/// - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)`
+/// - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)`
+/// - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)`
+STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+ // check arguments
+ mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
+
+ // work out port
+ int uart_id = 0;
+ if (MP_OBJ_IS_STR(args[0])) {
+ const char *port = mp_obj_str_get_str(args[0]);
+ if (0) {
+ #ifdef MICROPY_HW_UART1_NAME
+ } else if (strcmp(port, MICROPY_HW_UART1_NAME) == 0) {
+ uart_id = PYB_UART_1;
+ #endif
+ #ifdef MICROPY_HW_UART2_NAME
+ } else if (strcmp(port, MICROPY_HW_UART2_NAME) == 0) {
+ uart_id = PYB_UART_2;
+ #endif
+ #ifdef MICROPY_HW_UART3_NAME
+ } else if (strcmp(port, MICROPY_HW_UART3_NAME) == 0) {
+ uart_id = PYB_UART_3;
+ #endif
+ #ifdef MICROPY_HW_UART4_NAME
+ } else if (strcmp(port, MICROPY_HW_UART4_NAME) == 0) {
+ uart_id = PYB_UART_4;
+ #endif
+ #ifdef MICROPY_HW_UART5_NAME
+ } else if (strcmp(port, MICROPY_HW_UART5_NAME) == 0) {
+ uart_id = PYB_UART_5;
+ #endif
+ #ifdef MICROPY_HW_UART6_NAME
+ } else if (strcmp(port, MICROPY_HW_UART6_NAME) == 0) {
+ uart_id = PYB_UART_6;
+ #endif
+ #ifdef MICROPY_HW_UART7_NAME
+ } else if (strcmp(port, MICROPY_HW_UART7_NAME) == 0) {
+ uart_id = PYB_UART_7;
+ #endif
+ #ifdef MICROPY_HW_UART8_NAME
+ } else if (strcmp(port, MICROPY_HW_UART8_NAME) == 0) {
+ uart_id = PYB_UART_8;
+ #endif
+ } else {
+ nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%s) doesn't exist", port));
+ }
+ } else {
+ uart_id = mp_obj_get_int(args[0]);
+ if (!uart_exists(uart_id)) {
+ nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) doesn't exist", uart_id));
+ }
+ }
+
+ pyb_uart_obj_t *self;
+ if (MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] == NULL) {
+ // create new UART object
+ self = m_new0(pyb_uart_obj_t, 1);
+ self->base.type = &pyb_uart_type;
+ self->uart_id = uart_id;
+ MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] = self;
+ } else {
+ // reference existing UART object
+ self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1];
+ }
+
+ if (n_args > 1 || n_kw > 0) {
+ // start the peripheral
+ mp_map_t kw_args;
+ mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
+ pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
+ }
+
+ return MP_OBJ_FROM_PTR(self);
+}
+
+STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
+ return pyb_uart_init_helper(MP_OBJ_TO_PTR(args[0]), n_args - 1, args + 1, kw_args);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init);
+
+/// \method deinit()
+/// Turn off the UART bus.
+STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+ uart_deinit(self);
+ return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit);
+
+/// \method any()
+/// Return `True` if any characters waiting, else `False`.
+STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+ return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self));
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any);
+
+/// \method writechar(char)
+/// Write a single character on the bus. `char` is an integer to write.
+/// Return value: `None`.
+STATIC mp_obj_t pyb_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+
+ // get the character to write (might be 9 bits)
+ uint16_t data = mp_obj_get_int(char_in);
+
+ // write the character
+ int errcode;
+ if (uart_tx_wait(self, self->timeout)) {
+ uart_tx_data(self, &data, 1, &errcode);
+ } else {
+ errcode = MP_ETIMEDOUT;
+ }
+
+ if (errcode != 0) {
+ mp_raise_OSError(errcode);
+ }
+
+ return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_uart_writechar_obj, pyb_uart_writechar);
+
+/// \method readchar()
+/// Receive a single character on the bus.
+/// Return value: The character read, as an integer. Returns -1 on timeout.
+STATIC mp_obj_t pyb_uart_readchar(mp_obj_t self_in) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+ if (uart_rx_wait(self, self->timeout)) {
+ return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self));
+ } else {
+ // return -1 on timeout
+ return MP_OBJ_NEW_SMALL_INT(-1);
+ }
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_readchar_obj, pyb_uart_readchar);
+
+// uart.sendbreak()
+STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+ #if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
+ self->uart.Instance->RQR = USART_RQR_SBKRQ; // write-only register
+ #else
+ self->uart.Instance->CR1 |= USART_CR1_SBK;
+ #endif
+ return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak);
+
+STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = {
+ // instance methods
+
+ { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) },
+ { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) },
+ { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) },
+
+ /// \method read([nbytes])
+ { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
+ /// \method readline()
+ { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)},
+ /// \method readinto(buf[, nbytes])
+ { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
+ /// \method write(buf)
+ { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
+
+ { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&pyb_uart_writechar_obj) },
+ { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&pyb_uart_readchar_obj) },
+ { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&pyb_uart_sendbreak_obj) },
+
+ // class constants
+ { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) },
+ { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) },
+};
+
+STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table);
+
+STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+ byte *buf = buf_in;
+
+ // check that size is a multiple of character width
+ if (size & self->char_width) {
+ *errcode = MP_EIO;
+ return MP_STREAM_ERROR;
+ }
+
+ // convert byte size to char size
+ size >>= self->char_width;
+
+ // make sure we want at least 1 char
+ if (size == 0) {
+ return 0;
+ }
+
+ // wait for first char to become available
+ if (!uart_rx_wait(self, self->timeout)) {
+ // return EAGAIN error to indicate non-blocking (then read() method returns None)
+ *errcode = MP_EAGAIN;
+ return MP_STREAM_ERROR;
+ }
+
+ // read the data
+ byte *orig_buf = buf;
+ for (;;) {
+ int data = uart_rx_char(self);
+ if (self->char_width == CHAR_WIDTH_9BIT) {
+ *(uint16_t*)buf = data;
+ buf += 2;
+ } else {
+ *buf++ = data;
+ }
+ if (--size == 0 || !uart_rx_wait(self, self->timeout_char)) {
+ // return number of bytes read
+ return buf - orig_buf;
+ }
+ }
+}
+
+STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+ const byte *buf = buf_in;
+
+ // check that size is a multiple of character width
+ if (size & self->char_width) {
+ *errcode = MP_EIO;
+ return MP_STREAM_ERROR;
+ }
+
+ // wait to be able to write the first character. EAGAIN causes write to return None
+ if (!uart_tx_wait(self, self->timeout)) {
+ *errcode = MP_EAGAIN;
+ return MP_STREAM_ERROR;
+ }
+
+ // write the data
+ size_t num_tx = uart_tx_data(self, buf, size >> self->char_width, errcode);
+
+ if (*errcode == 0 || *errcode == MP_ETIMEDOUT) {
+ // return number of bytes written, even if there was a timeout
+ return num_tx << self->char_width;
+ } else {
+ return MP_STREAM_ERROR;
+ }
+}
+
+STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
+ pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
+ mp_uint_t ret;
+ if (request == MP_STREAM_POLL) {
+ uintptr_t flags = arg;
+ ret = 0;
+ if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self)) {
+ ret |= MP_STREAM_POLL_RD;
+ }
+ if ((flags & MP_STREAM_POLL_WR) && __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) {
+ ret |= MP_STREAM_POLL_WR;
+ }
+ } else {
+ *errcode = MP_EINVAL;
+ ret = MP_STREAM_ERROR;
+ }
+ return ret;
+}
+
+STATIC const mp_stream_p_t uart_stream_p = {
+ .read = pyb_uart_read,
+ .write = pyb_uart_write,
+ .ioctl = pyb_uart_ioctl,
+ .is_text = false,
+};
+
+const mp_obj_type_t pyb_uart_type = {
+ { &mp_type_type },
+ .name = MP_QSTR_UART,
+ .print = pyb_uart_print,
+ .make_new = pyb_uart_make_new,
+ .getiter = mp_identity_getiter,
+ .iternext = mp_stream_unbuffered_iter,
+ .protocol = &uart_stream_p,
+ .locals_dict = (mp_obj_dict_t*)&pyb_uart_locals_dict,
+};
diff --git a/ports/stm32/main.c b/ports/stm32/main.c
index 6c37e1351..f14176efa 100644
--- a/ports/stm32/main.c
+++ b/ports/stm32/main.c
@@ -755,7 +755,7 @@ soft_reset_exit:
mod_network_deinit();
#endif
timer_deinit();
- uart_deinit();
+ uart_deinit_all();
#if MICROPY_HW_ENABLE_CAN
can_deinit();
#endif
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
index 78d853d03..83eef705a 100644
--- a/ports/stm32/uart.c
+++ b/ports/stm32/uart.c
@@ -37,62 +37,6 @@
#include "irq.h"
#include "pendsv.h"
-/// \moduleref pyb
-/// \class UART - duplex serial communication bus
-///
-/// UART implements the standard UART/USART duplex serial communications protocol. At
-/// the physical level it consists of 2 lines: RX and TX. The unit of communication
-/// is a character (not to be confused with a string character) which can be 8 or 9
-/// bits wide.
-///
-/// UART objects can be created and initialised using:
-///
-/// from pyb import UART
-///
-/// uart = UART(1, 9600) # init with given baudrate
-/// uart.init(9600, bits=8, parity=None, stop=1) # init with given parameters
-///
-/// Bits can be 8 or 9. Parity can be None, 0 (even) or 1 (odd). Stop can be 1 or 2.
-///
-/// A UART object acts like a stream object and reading and writing is done
-/// using the standard stream methods:
-///
-/// uart.read(10) # read 10 characters, returns a bytes object
-/// uart.read() # read all available characters
-/// uart.readline() # read a line
-/// uart.readinto(buf) # read and store into the given buffer
-/// uart.write('abc') # write the 3 characters
-///
-/// Individual characters can be read/written using:
-///
-/// uart.readchar() # read 1 character and returns it as an integer
-/// uart.writechar(42) # write 1 character
-///
-/// To check if there is anything to be read, use:
-///
-/// uart.any() # returns True if any characters waiting
-
-#define CHAR_WIDTH_8BIT (0)
-#define CHAR_WIDTH_9BIT (1)
-
-struct _pyb_uart_obj_t {
- mp_obj_base_t base;
- UART_HandleTypeDef uart; // this is 17 words big
- IRQn_Type irqn;
- pyb_uart_t uart_id : 8;
- bool is_enabled : 1;
- bool attached_to_repl; // whether the UART is attached to REPL
- byte char_width; // 0 for 7,8 bit chars, 1 for 9 bit chars
- uint16_t char_mask; // 0x7f for 7 bit, 0xff for 8 bit, 0x1ff for 9 bit
- uint16_t timeout; // timeout waiting for first char
- uint16_t timeout_char; // timeout waiting between chars
- uint16_t read_buf_len; // len in chars; buf can hold len-1 chars
- volatile uint16_t read_buf_head; // indexes first empty slot
- uint16_t read_buf_tail; // indexes first full slot (not full if equals head)
- byte *read_buf; // byte or uint16_t, depending on char size
-};
-
-STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in);
extern void NORETURN __fatal_error(const char *msg);
void uart_init0(void) {
@@ -119,16 +63,16 @@ void uart_init0(void) {
}
// unregister all interrupt sources
-void uart_deinit(void) {
+void uart_deinit_all(void) {
for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) {
pyb_uart_obj_t *uart_obj = MP_STATE_PORT(pyb_uart_obj_all)[i];
if (uart_obj != NULL) {
- pyb_uart_deinit(MP_OBJ_FROM_PTR(uart_obj));
+ uart_deinit(uart_obj);
}
}
}
-STATIC bool uart_exists(int uart_id) {
+bool uart_exists(int uart_id) {
if (uart_id > MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all))) {
// safeguard against pyb_uart_obj_all array being configured too small
return false;
@@ -171,7 +115,7 @@ STATIC bool uart_exists(int uart_id) {
}
// assumes Init parameters have been set up correctly
-STATIC bool uart_init2(pyb_uart_obj_t *uart_obj) {
+bool uart_init2(pyb_uart_obj_t *uart_obj) {
USART_TypeDef *UARTx;
IRQn_Type irqn;
int uart_unit;
@@ -358,6 +302,91 @@ STATIC bool uart_init2(pyb_uart_obj_t *uart_obj) {
return true;
}
+void uart_deinit(pyb_uart_obj_t *self) {
+ self->is_enabled = false;
+ UART_HandleTypeDef *uart = &self->uart;
+ HAL_UART_DeInit(uart);
+ if (uart->Instance == USART1) {
+ HAL_NVIC_DisableIRQ(USART1_IRQn);
+ __HAL_RCC_USART1_FORCE_RESET();
+ __HAL_RCC_USART1_RELEASE_RESET();
+ __HAL_RCC_USART1_CLK_DISABLE();
+ } else if (uart->Instance == USART2) {
+ HAL_NVIC_DisableIRQ(USART2_IRQn);
+ __HAL_RCC_USART2_FORCE_RESET();
+ __HAL_RCC_USART2_RELEASE_RESET();
+ __HAL_RCC_USART2_CLK_DISABLE();
+ #if defined(USART3)
+ } else if (uart->Instance == USART3) {
+ #if !defined(STM32F0)
+ HAL_NVIC_DisableIRQ(USART3_IRQn);
+ #endif
+ __HAL_RCC_USART3_FORCE_RESET();
+ __HAL_RCC_USART3_RELEASE_RESET();
+ __HAL_RCC_USART3_CLK_DISABLE();
+ #endif
+ #if defined(UART4)
+ } else if (uart->Instance == UART4) {
+ HAL_NVIC_DisableIRQ(UART4_IRQn);
+ __HAL_RCC_UART4_FORCE_RESET();
+ __HAL_RCC_UART4_RELEASE_RESET();
+ __HAL_RCC_UART4_CLK_DISABLE();
+ #endif
+ #if defined(USART4)
+ } else if (uart->Instance == USART4) {
+ __HAL_RCC_USART4_FORCE_RESET();
+ __HAL_RCC_USART4_RELEASE_RESET();
+ __HAL_RCC_USART4_CLK_DISABLE();
+ #endif
+ #if defined(UART5)
+ } else if (uart->Instance == UART5) {
+ HAL_NVIC_DisableIRQ(UART5_IRQn);
+ __HAL_RCC_UART5_FORCE_RESET();
+ __HAL_RCC_UART5_RELEASE_RESET();
+ __HAL_RCC_UART5_CLK_DISABLE();
+ #endif
+ #if defined(USART5)
+ } else if (uart->Instance == USART5) {
+ __HAL_RCC_USART5_FORCE_RESET();
+ __HAL_RCC_USART5_RELEASE_RESET();
+ __HAL_RCC_USART5_CLK_DISABLE();
+ #endif
+ #if defined(UART6)
+ } else if (uart->Instance == USART6) {
+ HAL_NVIC_DisableIRQ(USART6_IRQn);
+ __HAL_RCC_USART6_FORCE_RESET();
+ __HAL_RCC_USART6_RELEASE_RESET();
+ __HAL_RCC_USART6_CLK_DISABLE();
+ #endif
+ #if defined(UART7)
+ } else if (uart->Instance == UART7) {
+ HAL_NVIC_DisableIRQ(UART7_IRQn);
+ __HAL_RCC_UART7_FORCE_RESET();
+ __HAL_RCC_UART7_RELEASE_RESET();
+ __HAL_RCC_UART7_CLK_DISABLE();
+ #endif
+ #if defined(USART7)
+ } else if (uart->Instance == USART7) {
+ __HAL_RCC_USART7_FORCE_RESET();
+ __HAL_RCC_USART7_RELEASE_RESET();
+ __HAL_RCC_USART7_CLK_DISABLE();
+ #endif
+ #if defined(UART8)
+ } else if (uart->Instance == UART8) {
+ HAL_NVIC_DisableIRQ(UART8_IRQn);
+ __HAL_RCC_UART8_FORCE_RESET();
+ __HAL_RCC_UART8_RELEASE_RESET();
+ __HAL_RCC_UART8_CLK_DISABLE();
+ #endif
+ #if defined(USART8)
+ } else if (uart->Instance == USART8) {
+ __HAL_RCC_USART8_FORCE_RESET();
+ __HAL_RCC_USART8_RELEASE_RESET();
+ __HAL_RCC_USART8_CLK_DISABLE();
+ #endif
+ }
+}
+
void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached) {
self->attached_to_repl = attached;
}
@@ -391,7 +420,7 @@ mp_uint_t uart_rx_any(pyb_uart_obj_t *self) {
// Waits at most timeout milliseconds for at least 1 char to become ready for
// reading (from buf or for direct reading).
// Returns true if something available, false if not.
-STATIC bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
+bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
uint32_t start = HAL_GetTick();
for (;;) {
if (self->read_buf_tail != self->read_buf_head || __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) {
@@ -432,7 +461,7 @@ int uart_rx_char(pyb_uart_obj_t *self) {
// Waits at most timeout milliseconds for TX register to become empty.
// Returns true if can write, false if can't.
-STATIC bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
+bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
uint32_t start = HAL_GetTick();
for (;;) {
if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) {
@@ -465,7 +494,7 @@ STATIC bool uart_wait_flag_set(pyb_uart_obj_t *self, uint32_t flag, uint32_t tim
// num_chars - number of characters to send (9-bit chars count for 2 bytes from src)
// *errcode - returns 0 for success, MP_Exxx on error
// returns the number of characters sent (valid even if there was an error)
-STATIC size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode) {
+size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode) {
if (num_chars == 0) {
*errcode = 0;
return 0;
@@ -563,610 +592,3 @@ void uart_irq_handler(mp_uint_t uart_id) {
}
}
}
-
-/******************************************************************************/
-/* MicroPython bindings */
-
-STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
- if (!self->is_enabled) {
- mp_printf(print, "UART(%u)", self->uart_id);
- } else {
- mp_int_t bits;
- switch (self->uart.Init.WordLength) {
- #ifdef UART_WORDLENGTH_7B
- case UART_WORDLENGTH_7B: bits = 7; break;
- #endif
- case UART_WORDLENGTH_8B: bits = 8; break;
- case UART_WORDLENGTH_9B: default: bits = 9; break;
- }
- if (self->uart.Init.Parity != UART_PARITY_NONE) {
- bits -= 1;
- }
- mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=",
- self->uart_id, self->uart.Init.BaudRate, bits);
- if (self->uart.Init.Parity == UART_PARITY_NONE) {
- mp_print_str(print, "None");
- } else if (self->uart.Init.Parity == UART_PARITY_EVEN) {
- mp_print_str(print, "0");
- } else {
- mp_print_str(print, "1");
- }
- mp_printf(print, ", stop=%u, flow=",
- self->uart.Init.StopBits == UART_STOPBITS_1 ? 1 : 2);
- if (self->uart.Init.HwFlowCtl == UART_HWCONTROL_NONE) {
- mp_print_str(print, "0");
- } else {
- if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) {
- mp_print_str(print, "RTS");
- if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
- mp_print_str(print, "|");
- }
- }
- if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
- mp_print_str(print, "CTS");
- }
- }
- mp_printf(print, ", timeout=%u, timeout_char=%u, rxbuf=%u)",
- self->timeout, self->timeout_char,
- self->read_buf_len == 0 ? 0 : self->read_buf_len - 1); // -1 to adjust for usable length of buffer
- }
-}
-
-/// \method init(baudrate, bits=8, parity=None, stop=1, *, timeout=1000, timeout_char=0, flow=0, read_buf_len=64)
-///
-/// Initialise the UART bus with the given parameters:
-///
-/// - `baudrate` is the clock rate.
-/// - `bits` is the number of bits per byte, 7, 8 or 9.
-/// - `parity` is the parity, `None`, 0 (even) or 1 (odd).
-/// - `stop` is the number of stop bits, 1 or 2.
-/// - `timeout` is the timeout in milliseconds to wait for the first character.
-/// - `timeout_char` is the timeout in milliseconds to wait between characters.
-/// - `flow` is RTS | CTS where RTS == 256, CTS == 512
-/// - `read_buf_len` is the character length of the read buffer (0 to disable).
-STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
- static const mp_arg_t allowed_args[] = {
- { MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} },
- { MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
- { MP_QSTR_parity, MP_ARG_OBJ, {.u_rom_obj = MP_ROM_PTR(&mp_const_none_obj)} },
- { MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} },
- { MP_QSTR_flow, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_HWCONTROL_NONE} },
- { MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} },
- { MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
- { MP_QSTR_rxbuf, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = -1} },
- { MP_QSTR_read_buf_len, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} }, // legacy
- };
-
- // parse args
- struct {
- mp_arg_val_t baudrate, bits, parity, stop, flow, timeout, timeout_char, rxbuf, read_buf_len;
- } args;
- mp_arg_parse_all(n_args, pos_args, kw_args,
- MP_ARRAY_SIZE(allowed_args), allowed_args, (mp_arg_val_t*)&args);
-
- // set the UART configuration values
- memset(&self->uart, 0, sizeof(self->uart));
- UART_InitTypeDef *init = &self->uart.Init;
-
- // baudrate
- init->BaudRate = args.baudrate.u_int;
-
- // parity
- mp_int_t bits = args.bits.u_int;
- if (args.parity.u_obj == mp_const_none) {
- init->Parity = UART_PARITY_NONE;
- } else {
- mp_int_t parity = mp_obj_get_int(args.parity.u_obj);
- init->Parity = (parity & 1) ? UART_PARITY_ODD : UART_PARITY_EVEN;
- bits += 1; // STs convention has bits including parity
- }
-
- // number of bits
- if (bits == 8) {
- init->WordLength = UART_WORDLENGTH_8B;
- } else if (bits == 9) {
- init->WordLength = UART_WORDLENGTH_9B;
- #ifdef UART_WORDLENGTH_7B
- } else if (bits == 7) {
- init->WordLength = UART_WORDLENGTH_7B;
- #endif
- } else {
- mp_raise_ValueError("unsupported combination of bits and parity");
- }
-
- // stop bits
- switch (args.stop.u_int) {
- case 1: init->StopBits = UART_STOPBITS_1; break;
- default: init->StopBits = UART_STOPBITS_2; break;
- }
-
- // flow control
- init->HwFlowCtl = args.flow.u_int;
-
- // extra config (not yet configurable)
- init->Mode = UART_MODE_TX_RX;
- init->OverSampling = UART_OVERSAMPLING_16;
-
- // init UART (if it fails, it's because the port doesn't exist)
- if (!uart_init2(self)) {
- nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) doesn't exist", self->uart_id));
- }
-
- // set timeout
- self->timeout = args.timeout.u_int;
-
- // set timeout_char
- // make sure it is at least as long as a whole character (13 bits to be safe)
- // minimum value is 2ms because sys-tick has a resolution of only 1ms
- self->timeout_char = args.timeout_char.u_int;
- uint32_t min_timeout_char = 13000 / init->BaudRate + 2;
- if (self->timeout_char < min_timeout_char) {
- self->timeout_char = min_timeout_char;
- }
-
- // setup the read buffer
- m_del(byte, self->read_buf, self->read_buf_len << self->char_width);
- if (init->WordLength == UART_WORDLENGTH_9B && init->Parity == UART_PARITY_NONE) {
- self->char_mask = 0x1ff;
- self->char_width = CHAR_WIDTH_9BIT;
- } else {
- if (init->WordLength == UART_WORDLENGTH_9B || init->Parity == UART_PARITY_NONE) {
- self->char_mask = 0xff;
- } else {
- self->char_mask = 0x7f;
- }
- self->char_width = CHAR_WIDTH_8BIT;
- }
- self->read_buf_head = 0;
- self->read_buf_tail = 0;
- if (args.rxbuf.u_int >= 0) {
- // rxbuf overrides legacy read_buf_len
- args.read_buf_len.u_int = args.rxbuf.u_int;
- }
- if (args.read_buf_len.u_int <= 0) {
- // no read buffer
- self->read_buf_len = 0;
- self->read_buf = NULL;
- HAL_NVIC_DisableIRQ(self->irqn);
- __HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE);
- } else {
- // read buffer using interrupts
- self->read_buf_len = args.read_buf_len.u_int + 1; // +1 to adjust for usable length of buffer
- self->read_buf = m_new(byte, self->read_buf_len << self->char_width);
- __HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE);
- NVIC_SetPriority(IRQn_NONNEG(self->irqn), IRQ_PRI_UART);
- HAL_NVIC_EnableIRQ(self->irqn);
- }
-
- // compute actual baudrate that was configured
- // (this formula assumes UART_OVERSAMPLING_16)
- uint32_t actual_baudrate = 0;
- #if defined(STM32F0)
- actual_baudrate = HAL_RCC_GetPCLK1Freq();
- #elif defined(STM32F7) || defined(STM32H7)
- UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
- UART_GETCLOCKSOURCE(&self->uart, clocksource);
- switch (clocksource) {
- #if defined(STM32H7)
- case UART_CLOCKSOURCE_D2PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
- case UART_CLOCKSOURCE_D3PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
- case UART_CLOCKSOURCE_D2PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break;
- #else
- case UART_CLOCKSOURCE_PCLK1: actual_baudrate = HAL_RCC_GetPCLK1Freq(); break;
- case UART_CLOCKSOURCE_PCLK2: actual_baudrate = HAL_RCC_GetPCLK2Freq(); break;
- case UART_CLOCKSOURCE_SYSCLK: actual_baudrate = HAL_RCC_GetSysClockFreq(); break;
- #endif
- #if defined(STM32H7)
- case UART_CLOCKSOURCE_CSI: actual_baudrate = CSI_VALUE; break;
- #endif
- case UART_CLOCKSOURCE_HSI: actual_baudrate = HSI_VALUE; break;
- case UART_CLOCKSOURCE_LSE: actual_baudrate = LSE_VALUE; break;
- #if defined(STM32H7)
- case UART_CLOCKSOURCE_PLL2:
- case UART_CLOCKSOURCE_PLL3:
- #endif
- case UART_CLOCKSOURCE_UNDEFINED: break;
- }
- #else
- if (self->uart.Instance == USART1
- #if defined(USART6)
- || self->uart.Instance == USART6
- #endif
- ) {
- actual_baudrate = HAL_RCC_GetPCLK2Freq();
- } else {
- actual_baudrate = HAL_RCC_GetPCLK1Freq();
- }
- #endif
- actual_baudrate /= self->uart.Instance->BRR;
-
- // check we could set the baudrate within 5%
- uint32_t baudrate_diff;
- if (actual_baudrate > init->BaudRate) {
- baudrate_diff = actual_baudrate - init->BaudRate;
- } else {
- baudrate_diff = init->BaudRate - actual_baudrate;
- }
- init->BaudRate = actual_baudrate; // remember actual baudrate for printing
- if (20 * baudrate_diff > init->BaudRate) {
- nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "set baudrate %d is not within 5%% of desired value", actual_baudrate));
- }
-
- return mp_const_none;
-}
-
-/// \classmethod \constructor(bus, ...)
-///
-/// Construct a UART object on the given bus. `bus` can be 1-6, or 'XA', 'XB', 'YA', or 'YB'.
-/// With no additional parameters, the UART object is created but not
-/// initialised (it has the settings from the last initialisation of
-/// the bus, if any). If extra arguments are given, the bus is initialised.
-/// See `init` for parameters of initialisation.
-///
-/// The physical pins of the UART busses are:
-///
-/// - `UART(4)` is on `XA`: `(TX, RX) = (X1, X2) = (PA0, PA1)`
-/// - `UART(1)` is on `XB`: `(TX, RX) = (X9, X10) = (PB6, PB7)`
-/// - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)`
-/// - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)`
-/// - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)`
-STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
- // check arguments
- mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
-
- // work out port
- int uart_id = 0;
- if (MP_OBJ_IS_STR(args[0])) {
- const char *port = mp_obj_str_get_str(args[0]);
- if (0) {
- #ifdef MICROPY_HW_UART1_NAME
- } else if (strcmp(port, MICROPY_HW_UART1_NAME) == 0) {
- uart_id = PYB_UART_1;
- #endif
- #ifdef MICROPY_HW_UART2_NAME
- } else if (strcmp(port, MICROPY_HW_UART2_NAME) == 0) {
- uart_id = PYB_UART_2;
- #endif
- #ifdef MICROPY_HW_UART3_NAME
- } else if (strcmp(port, MICROPY_HW_UART3_NAME) == 0) {
- uart_id = PYB_UART_3;
- #endif
- #ifdef MICROPY_HW_UART4_NAME
- } else if (strcmp(port, MICROPY_HW_UART4_NAME) == 0) {
- uart_id = PYB_UART_4;
- #endif
- #ifdef MICROPY_HW_UART5_NAME
- } else if (strcmp(port, MICROPY_HW_UART5_NAME) == 0) {
- uart_id = PYB_UART_5;
- #endif
- #ifdef MICROPY_HW_UART6_NAME
- } else if (strcmp(port, MICROPY_HW_UART6_NAME) == 0) {
- uart_id = PYB_UART_6;
- #endif
- #ifdef MICROPY_HW_UART7_NAME
- } else if (strcmp(port, MICROPY_HW_UART7_NAME) == 0) {
- uart_id = PYB_UART_7;
- #endif
- #ifdef MICROPY_HW_UART8_NAME
- } else if (strcmp(port, MICROPY_HW_UART8_NAME) == 0) {
- uart_id = PYB_UART_8;
- #endif
- } else {
- nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%s) doesn't exist", port));
- }
- } else {
- uart_id = mp_obj_get_int(args[0]);
- if (!uart_exists(uart_id)) {
- nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) doesn't exist", uart_id));
- }
- }
-
- pyb_uart_obj_t *self;
- if (MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] == NULL) {
- // create new UART object
- self = m_new0(pyb_uart_obj_t, 1);
- self->base.type = &pyb_uart_type;
- self->uart_id = uart_id;
- MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] = self;
- } else {
- // reference existing UART object
- self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1];
- }
-
- if (n_args > 1 || n_kw > 0) {
- // start the peripheral
- mp_map_t kw_args;
- mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
- pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
- }
-
- return MP_OBJ_FROM_PTR(self);
-}
-
-STATIC mp_obj_t pyb_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
- return pyb_uart_init_helper(MP_OBJ_TO_PTR(args[0]), n_args - 1, args + 1, kw_args);
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init);
-
-/// \method deinit()
-/// Turn off the UART bus.
-STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
- self->is_enabled = false;
- UART_HandleTypeDef *uart = &self->uart;
- HAL_UART_DeInit(uart);
- if (uart->Instance == USART1) {
- HAL_NVIC_DisableIRQ(USART1_IRQn);
- __HAL_RCC_USART1_FORCE_RESET();
- __HAL_RCC_USART1_RELEASE_RESET();
- __HAL_RCC_USART1_CLK_DISABLE();
- } else if (uart->Instance == USART2) {
- HAL_NVIC_DisableIRQ(USART2_IRQn);
- __HAL_RCC_USART2_FORCE_RESET();
- __HAL_RCC_USART2_RELEASE_RESET();
- __HAL_RCC_USART2_CLK_DISABLE();
- #if defined(USART3)
- } else if (uart->Instance == USART3) {
- #if !defined(STM32F0)
- HAL_NVIC_DisableIRQ(USART3_IRQn);
- #endif
- __HAL_RCC_USART3_FORCE_RESET();
- __HAL_RCC_USART3_RELEASE_RESET();
- __HAL_RCC_USART3_CLK_DISABLE();
- #endif
- #if defined(UART4)
- } else if (uart->Instance == UART4) {
- HAL_NVIC_DisableIRQ(UART4_IRQn);
- __HAL_RCC_UART4_FORCE_RESET();
- __HAL_RCC_UART4_RELEASE_RESET();
- __HAL_RCC_UART4_CLK_DISABLE();
- #endif
- #if defined(USART4)
- } else if (uart->Instance == USART4) {
- __HAL_RCC_USART4_FORCE_RESET();
- __HAL_RCC_USART4_RELEASE_RESET();
- __HAL_RCC_USART4_CLK_DISABLE();
- #endif
- #if defined(UART5)
- } else if (uart->Instance == UART5) {
- HAL_NVIC_DisableIRQ(UART5_IRQn);
- __HAL_RCC_UART5_FORCE_RESET();
- __HAL_RCC_UART5_RELEASE_RESET();
- __HAL_RCC_UART5_CLK_DISABLE();
- #endif
- #if defined(USART5)
- } else if (uart->Instance == USART5) {
- __HAL_RCC_USART5_FORCE_RESET();
- __HAL_RCC_USART5_RELEASE_RESET();
- __HAL_RCC_USART5_CLK_DISABLE();
- #endif
- #if defined(UART6)
- } else if (uart->Instance == USART6) {
- HAL_NVIC_DisableIRQ(USART6_IRQn);
- __HAL_RCC_USART6_FORCE_RESET();
- __HAL_RCC_USART6_RELEASE_RESET();
- __HAL_RCC_USART6_CLK_DISABLE();
- #endif
- #if defined(UART7)
- } else if (uart->Instance == UART7) {
- HAL_NVIC_DisableIRQ(UART7_IRQn);
- __HAL_RCC_UART7_FORCE_RESET();
- __HAL_RCC_UART7_RELEASE_RESET();
- __HAL_RCC_UART7_CLK_DISABLE();
- #endif
- #if defined(USART7)
- } else if (uart->Instance == USART7) {
- __HAL_RCC_USART7_FORCE_RESET();
- __HAL_RCC_USART7_RELEASE_RESET();
- __HAL_RCC_USART7_CLK_DISABLE();
- #endif
- #if defined(UART8)
- } else if (uart->Instance == UART8) {
- HAL_NVIC_DisableIRQ(UART8_IRQn);
- __HAL_RCC_UART8_FORCE_RESET();
- __HAL_RCC_UART8_RELEASE_RESET();
- __HAL_RCC_UART8_CLK_DISABLE();
- #endif
- #if defined(USART8)
- } else if (uart->Instance == USART8) {
- __HAL_RCC_USART8_FORCE_RESET();
- __HAL_RCC_USART8_RELEASE_RESET();
- __HAL_RCC_USART8_CLK_DISABLE();
- #endif
- }
- return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit);
-
-/// \method any()
-/// Return `True` if any characters waiting, else `False`.
-STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
- return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self));
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any);
-
-/// \method writechar(char)
-/// Write a single character on the bus. `char` is an integer to write.
-/// Return value: `None`.
-STATIC mp_obj_t pyb_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
-
- // get the character to write (might be 9 bits)
- uint16_t data = mp_obj_get_int(char_in);
-
- // write the character
- int errcode;
- if (uart_tx_wait(self, self->timeout)) {
- uart_tx_data(self, &data, 1, &errcode);
- } else {
- errcode = MP_ETIMEDOUT;
- }
-
- if (errcode != 0) {
- mp_raise_OSError(errcode);
- }
-
- return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_uart_writechar_obj, pyb_uart_writechar);
-
-/// \method readchar()
-/// Receive a single character on the bus.
-/// Return value: The character read, as an integer. Returns -1 on timeout.
-STATIC mp_obj_t pyb_uart_readchar(mp_obj_t self_in) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
- if (uart_rx_wait(self, self->timeout)) {
- return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self));
- } else {
- // return -1 on timeout
- return MP_OBJ_NEW_SMALL_INT(-1);
- }
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_readchar_obj, pyb_uart_readchar);
-
-// uart.sendbreak()
-STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
- #if defined(STM32F0) || defined(STM32F7) || defined(STM32L4) || defined(STM32H7)
- self->uart.Instance->RQR = USART_RQR_SBKRQ; // write-only register
- #else
- self->uart.Instance->CR1 |= USART_CR1_SBK;
- #endif
- return mp_const_none;
-}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak);
-
-STATIC const mp_rom_map_elem_t pyb_uart_locals_dict_table[] = {
- // instance methods
-
- { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&pyb_uart_init_obj) },
- { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&pyb_uart_deinit_obj) },
- { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&pyb_uart_any_obj) },
-
- /// \method read([nbytes])
- { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
- /// \method readline()
- { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj)},
- /// \method readinto(buf[, nbytes])
- { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
- /// \method write(buf)
- { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
-
- { MP_ROM_QSTR(MP_QSTR_writechar), MP_ROM_PTR(&pyb_uart_writechar_obj) },
- { MP_ROM_QSTR(MP_QSTR_readchar), MP_ROM_PTR(&pyb_uart_readchar_obj) },
- { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&pyb_uart_sendbreak_obj) },
-
- // class constants
- { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) },
- { MP_ROM_QSTR(MP_QSTR_CTS), MP_ROM_INT(UART_HWCONTROL_CTS) },
-};
-
-STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table);
-
-STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
- byte *buf = buf_in;
-
- // check that size is a multiple of character width
- if (size & self->char_width) {
- *errcode = MP_EIO;
- return MP_STREAM_ERROR;
- }
-
- // convert byte size to char size
- size >>= self->char_width;
-
- // make sure we want at least 1 char
- if (size == 0) {
- return 0;
- }
-
- // wait for first char to become available
- if (!uart_rx_wait(self, self->timeout)) {
- // return EAGAIN error to indicate non-blocking (then read() method returns None)
- *errcode = MP_EAGAIN;
- return MP_STREAM_ERROR;
- }
-
- // read the data
- byte *orig_buf = buf;
- for (;;) {
- int data = uart_rx_char(self);
- if (self->char_width == CHAR_WIDTH_9BIT) {
- *(uint16_t*)buf = data;
- buf += 2;
- } else {
- *buf++ = data;
- }
- if (--size == 0 || !uart_rx_wait(self, self->timeout_char)) {
- // return number of bytes read
- return buf - orig_buf;
- }
- }
-}
-
-STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
- const byte *buf = buf_in;
-
- // check that size is a multiple of character width
- if (size & self->char_width) {
- *errcode = MP_EIO;
- return MP_STREAM_ERROR;
- }
-
- // wait to be able to write the first character. EAGAIN causes write to return None
- if (!uart_tx_wait(self, self->timeout)) {
- *errcode = MP_EAGAIN;
- return MP_STREAM_ERROR;
- }
-
- // write the data
- size_t num_tx = uart_tx_data(self, buf, size >> self->char_width, errcode);
-
- if (*errcode == 0 || *errcode == MP_ETIMEDOUT) {
- // return number of bytes written, even if there was a timeout
- return num_tx << self->char_width;
- } else {
- return MP_STREAM_ERROR;
- }
-}
-
-STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
- pyb_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
- mp_uint_t ret;
- if (request == MP_STREAM_POLL) {
- uintptr_t flags = arg;
- ret = 0;
- if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self)) {
- ret |= MP_STREAM_POLL_RD;
- }
- if ((flags & MP_STREAM_POLL_WR) && __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) {
- ret |= MP_STREAM_POLL_WR;
- }
- } else {
- *errcode = MP_EINVAL;
- ret = MP_STREAM_ERROR;
- }
- return ret;
-}
-
-STATIC const mp_stream_p_t uart_stream_p = {
- .read = pyb_uart_read,
- .write = pyb_uart_write,
- .ioctl = pyb_uart_ioctl,
- .is_text = false,
-};
-
-const mp_obj_type_t pyb_uart_type = {
- { &mp_type_type },
- .name = MP_QSTR_UART,
- .print = pyb_uart_print,
- .make_new = pyb_uart_make_new,
- .getiter = mp_identity_getiter,
- .iternext = mp_stream_unbuffered_iter,
- .protocol = &uart_stream_p,
- .locals_dict = (mp_obj_dict_t*)&pyb_uart_locals_dict,
-};
diff --git a/ports/stm32/uart.h b/ports/stm32/uart.h
index 4ab18ff22..649cd7f9f 100644
--- a/ports/stm32/uart.h
+++ b/ports/stm32/uart.h
@@ -38,16 +38,41 @@ typedef enum {
PYB_UART_8 = 8,
} pyb_uart_t;
-typedef struct _pyb_uart_obj_t pyb_uart_obj_t;
+#define CHAR_WIDTH_8BIT (0)
+#define CHAR_WIDTH_9BIT (1)
+
+typedef struct _pyb_uart_obj_t {
+ mp_obj_base_t base;
+ UART_HandleTypeDef uart; // this is 17 words big
+ IRQn_Type irqn;
+ pyb_uart_t uart_id : 8;
+ bool is_enabled : 1;
+ bool attached_to_repl; // whether the UART is attached to REPL
+ byte char_width; // 0 for 7,8 bit chars, 1 for 9 bit chars
+ uint16_t char_mask; // 0x7f for 7 bit, 0xff for 8 bit, 0x1ff for 9 bit
+ uint16_t timeout; // timeout waiting for first char
+ uint16_t timeout_char; // timeout waiting between chars
+ uint16_t read_buf_len; // len in chars; buf can hold len-1 chars
+ volatile uint16_t read_buf_head; // indexes first empty slot
+ uint16_t read_buf_tail; // indexes first full slot (not full if equals head)
+ byte *read_buf; // byte or uint16_t, depending on char size
+} pyb_uart_obj_t;
+
extern const mp_obj_type_t pyb_uart_type;
void uart_init0(void);
-void uart_deinit(void);
+void uart_deinit_all(void);
+bool uart_exists(int uart_id);
+bool uart_init2(pyb_uart_obj_t *uart_obj);
+void uart_deinit(pyb_uart_obj_t *uart_obj);
void uart_irq_handler(mp_uint_t uart_id);
void uart_attach_to_repl(pyb_uart_obj_t *self, bool attached);
mp_uint_t uart_rx_any(pyb_uart_obj_t *uart_obj);
+bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout);
int uart_rx_char(pyb_uart_obj_t *uart_obj);
+bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout);
+size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars, int *errcode);
void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len);
#endif // MICROPY_INCLUDED_STM32_UART_H