diff options
| author | Damien George | 2017-11-15 12:23:29 +1100 |
|---|---|---|
| committer | Damien George | 2017-11-15 12:23:29 +1100 |
| commit | 2cafef857e357bbfcf3bb3c6d10e62b778642695 (patch) | |
| tree | 3bf3caa7e6f228e4d55d473791e06c456f94635d | |
| parent | 1871a924c97cec16d0670d136e9f7056f99865df (diff) | |
stm32/boards/NUCLEO_F429ZI: Incr CPU freq to 168MHz to get USB working.
At the original frequency of 90MHz there's no way to get a 48MHz USB clock.
These new setting mirror those of the STM32F429DISC board.
| -rw-r--r-- | ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h index 42cc9d68c..608beef67 100644 --- a/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h +++ b/ports/stm32/boards/NUCLEO_F429ZI/mpconfigboard.h @@ -16,9 +16,9 @@ // HSE is 8MHz #define MICROPY_HW_CLK_PLLM (8) -#define MICROPY_HW_CLK_PLLN (180) +#define MICROPY_HW_CLK_PLLN (336) #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) -#define MICROPY_HW_CLK_PLLQ (4) +#define MICROPY_HW_CLK_PLLQ (7) // From the reference manual, for 2.7V to 3.6V // 151-180 MHz => 5 wait states |