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| author | herbelin | 2006-09-01 11:18:17 +0000 |
|---|---|---|
| committer | herbelin | 2006-09-01 11:18:17 +0000 |
| commit | 1fe97f12f24f596ab2408348e7556d483ed58e96 (patch) | |
| tree | 3e93ff6031bb01a122c252f28c23e387b5428a1e /pretyping/reductionops.ml | |
| parent | c0d3aade079394ec1e457c807ba0e104be6f6128 (diff) | |
Ajout is_sort: test si se réduit en une sorte
git-svn-id: svn+ssh://scm.gforge.inria.fr/svn/coq/trunk@9106 85f007b7-540e-0410-9357-904b9bb8a0f7
Diffstat (limited to 'pretyping/reductionops.ml')
| -rw-r--r-- | pretyping/reductionops.ml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/pretyping/reductionops.ml b/pretyping/reductionops.ml index 2cb7b80f73..76a053872a 100644 --- a/pretyping/reductionops.ml +++ b/pretyping/reductionops.ml @@ -770,6 +770,10 @@ let decomp_sort env sigma t = | Sort s -> s | _ -> raise NotASort +let is_sort env sigma arity = + try let _ = decomp_sort env sigma arity in true + with NotASort -> false + (* reduction to head-normal-form allowing delta/zeta only in argument of case/fix (heuristic used by evar_conv) *) |