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authorGaëtan Gilbert2019-02-26 23:41:38 +0100
committerGaëtan Gilbert2019-03-25 10:53:19 +0100
commitbf840bafc19deba67e5270dfd31b8b6662b73132 (patch)
tree0b35aa63d6faa37356b4b87d763e47577809f6d2 /engine/proofview.mli
parente8fd832d9e487fa57e2efe627223d04ff2977fa9 (diff)
Fix #9652: rewrite fails to detect lack of progress
Diffstat (limited to 'engine/proofview.mli')
-rw-r--r--engine/proofview.mli6
1 files changed, 5 insertions, 1 deletions
diff --git a/engine/proofview.mli b/engine/proofview.mli
index 680a93f0cc..c772525c86 100644
--- a/engine/proofview.mli
+++ b/engine/proofview.mli
@@ -395,10 +395,14 @@ val give_up : unit tactic
(** {7 Control primitives} *)
(** [tclPROGRESS t] checks the state of the proof after [t]. It it is
- identical to the state before, then [tclePROGRESS t] fails, otherwise
+ identical to the state before, then [tclPROGRESS t] fails, otherwise
it succeeds like [t]. *)
val tclPROGRESS : 'a tactic -> 'a tactic
+module Progress : sig
+ val goal_equal : Evd.evar_map -> Evar.t -> Evd.evar_map -> Evar.t -> bool
+end
+
(** Checks for interrupts *)
val tclCHECKINTERRUPT : unit tactic