1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
|
// SPDX-License-Identifier: Apache-2.0
package chiselTests
import chisel3._
import chisel3.experimental.{Analog, FixedPoint}
import chisel3.stage.ChiselStage
import chisel3.testers.BasicTester
abstract class CrossCheck extends Bundle {
val in: Data
val out: Data
}
class CrossConnects(inType: Data, outType: Data) extends Module {
val io = IO(new Bundle {
val in = Input(inType)
val out = Output(outType)
})
io.out := io.in
}
class PipeInternalWires extends Module {
import chisel3.util.Pipe
val io = IO(new Bundle {
val a = Input(Bool())
val b = Input(UInt(32.W))
})
val pipe = Module(new Pipe(UInt(32.W), 32))
pipe.io.enq.valid <> io.a
pipe.io.enq.bits <> io.b
}
class CrossConnectTester(inType: Data, outType: Data) extends BasicTester {
val dut = Module(new CrossConnects(inType, outType))
dut.io := DontCare
stop()
}
class ConnectSpec extends ChiselPropSpec with Utils {
property("SInt := SInt should succeed") {
assertTesterPasses{ new CrossConnectTester(SInt(16.W), SInt(16.W)) }
}
property("SInt := UInt should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(UInt(16.W), SInt(16.W)) } } }
}
property("SInt := FixedPoint should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(FixedPoint(16.W, 8.BP), UInt(16.W)) } } }
}
property("UInt := UInt should succeed") {
assertTesterPasses{ new CrossConnectTester(UInt(16.W), UInt(16.W)) }
}
property("UInt := SInt should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(SInt(16.W), UInt(16.W)) } } }
}
property("UInt := FixedPoint should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(FixedPoint(16.W, 8.BP), UInt(16.W)) } } }
}
property("Clock := Clock should succeed") {
assertTesterPasses{ new CrossConnectTester(Clock(), Clock()) }
}
property("Clock := UInt should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(Clock(), UInt(16.W)) } } }
}
property("FixedPoint := FixedPoint should succeed") {
assertTesterPasses{ new CrossConnectTester(FixedPoint(16.W, 8.BP), FixedPoint(16.W, 8.BP)) }
}
property("FixedPoint := SInt should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(SInt(16.W), FixedPoint(16.W, 8.BP)) } } }
}
property("FixedPoint := UInt should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(UInt(16.W), FixedPoint(16.W, 8.BP)) } } }
}
property("Analog := Analog should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(Analog(16.W), Analog(16.W)) } } }
}
property("Analog := FixedPoint should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(Analog(16.W), FixedPoint(16.W, 8.BP)) } } }
}
property("FixedPoint := Analog should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(FixedPoint(16.W, 8.BP), Analog(16.W)) } } }
}
property("Analog := UInt should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(Analog(16.W), UInt(16.W)) } } }
}
property("Analog := SInt should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(Analog(16.W), SInt(16.W)) } } }
}
property("UInt := Analog should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(UInt(16.W), Analog(16.W)) } } }
}
property("SInt := Analog should fail") {
intercept[ChiselException]{
extractCause[ChiselException] {
ChiselStage.elaborate { new CrossConnectTester(SInt(16.W), Analog(16.W)) } } }
}
property("Pipe internal connections should succeed") {
ChiselStage.elaborate( new PipeInternalWires)
}
}
|
