blob: 234d3a930ecabc8ddd8a1adef7aaa1e9994c7990 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
|
module BlackBoxInverter(
input [0:0] in,
output [0:0] out
);
assign out = !in;
endmodule
module BlackBoxPassthrough(
input [0:0] in,
output [0:0] out
);
assign out = in;
endmodule
module BlackBoxPassthrough2(
input [0:0] in,
output [0:0] out
);
assign out = in;
endmodule
module BlackBoxMinus(
input [15:0] in1,
input [15:0] in2,
output [15:0] out
);
assign out = in1 + in2;
endmodule
module BlackBoxRegister(
input [0:0] clock,
input [0:0] in,
output [0:0] out
);
reg [0:0] register;
always @(posedge clock) begin
register <= in;
end
assign out = register;
endmodule
module BlackBoxConstant #(
parameter int WIDTH=1,
parameter int VALUE=1
) (
output [WIDTH-1:0] out
);
assign out = VALUE;
endmodule
module BlackBoxStringParam #(
parameter string STRING = "zero"
) (
output [31:0] out
);
assign out = (STRING == "one" )? 1 :
(STRING == "two" )? 2 : 0;
endmodule
module BlackBoxRealParam #(
parameter real REAL = 0.0
) (
output [63:0] out
);
assign out = $realtobits(REAL);
endmodule
module BlackBoxTypeParam #(
parameter type T = bit
) (
output T out
);
assign out = 32'hdeadbeef;
endmodule
|
