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// SPDX-License-Identifier: Apache-2.0
package chisel3.util.experimental.decode
import chisel3._
import chisel3.experimental.{ChiselAnnotation, annotate}
import chisel3.util.{BitPat, pla}
import chisel3.util.experimental.getAnnotations
import firrtl.annotations.Annotation
import logger.LazyLogging
object decoder extends LazyLogging {
def apply(minimizer: Minimizer, input: UInt, truthTable: TruthTable): UInt = {
val minimizedTable = getAnnotations().collect {
case DecodeTableAnnotation(_, in, out) => TruthTable(in) -> TruthTable(out)
}.toMap.getOrElse(truthTable, minimizer.minimize(truthTable))
if (minimizedTable.table.isEmpty) {
val outputs = Wire(UInt(minimizedTable.default.getWidth.W))
outputs := minimizedTable.default.value.U(minimizedTable.default.getWidth.W)
outputs
} else {
val (plaInput, plaOutput) =
pla(minimizedTable.table.toSeq, BitPat(minimizedTable.default.value.U(minimizedTable.default.getWidth.W)))
annotate(new ChiselAnnotation {
override def toFirrtl: Annotation =
DecodeTableAnnotation(plaOutput.toTarget, truthTable.toString, minimizedTable.toString)
})
plaInput := input
plaOutput
}
}
}
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