blob: 8951032ef30c369ad467eabe96e5956baa967725 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
|
#include <verilated.h>
#include <iostream>
#if VM_TRACE
# include <verilated_vcd_c.h> // Trace file format header
#endif
using namespace std;
//VGCDTester *top;
TOP_TYPE *top;
vluint64_t main_time = 0; // Current simulation time
// This is a 64-bit integer to reduce wrap over issues and
// allow modulus. You can also use a double, if you wish.
double sc_time_stamp () { // Called by $time in Verilog
return main_time; // converts to double, to match
// what SystemC does
}
// TODO Provide command-line options like vcd filename, timeout count, etc.
const long timeout = 100000000L;
int main(int argc, char** argv) {
vluint32_t done = 0;
Verilated::commandArgs(argc, argv); // Remember args
top = new TOP_TYPE;
#if VM_TRACE // If verilator was invoked with --trace
Verilated::traceEverOn(true); // Verilator must compute traced signals
VL_PRINTF("Enabling waves...\n");
VerilatedVcdC* tfp = new VerilatedVcdC;
top->trace (tfp, 99); // Trace 99 levels of hierarchy
tfp->open ("dump.vcd"); // Open the dump file
#endif
top->reset = 1;
cout << "Starting simulation!\n";
while (!Verilated::gotFinish() && !done && main_time < timeout) {
if (main_time > 10) {
top->reset = 0; // Deassert reset
}
if ((main_time % 10) == 1) {
top->clock = 1; // Toggle clock
}
if ((main_time % 10) == 6) {
top->clock = 0;
}
top->eval(); // Evaluate model
#if VM_TRACE
if (tfp) tfp->dump (main_time); // Create waveform trace for this timestamp
#endif
done = top->io__024done;
main_time++; // Time passes...
}
// Run for 10 more clocks
vluint64_t end_time = main_time + 100;
while (main_time < end_time) {
if ((main_time % 10) == 1) {
top->clock = 1; // Toggle clock
}
if ((main_time % 10) == 6) {
top->clock = 0;
}
top->eval(); // Evaluate model
#if VM_TRACE
if (tfp) tfp->dump (main_time); // Create waveform trace for this timestamp
#endif
main_time++; // Time passes...
}
#if VM_TRACE
if (tfp) tfp->close();
#endif
if (main_time >= timeout)
cout << "Simulation terminated by timeout at cycle " << main_time << endl;
else
cout << "Simulation completed at cycle " << main_time << endl;
int error = top->io__024error;
cout << "Simulation return value: " << error << endl;
return error;
}
|