| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-11-23 | cleanup | Aditya Naik |
| 2022-01-10 | Apply scalafmt | Jack Koenig |
| 2021-02-01 | Update reported width from div/rem to match FIRRTL results (#1748) | Albert Magyar |
| 2020-10-01 | Move Chisel3 to SPDX license conventions (#1604) | Chick Markley |
| 2019-03-18 | Split #974 into two PRs - scalastyle updates (#1037) | Jim Lawson |
| 2019-01-25 | WireDefault instead of WireInit, keep WireInit around (#986) | Martin Schoeberl |
| 2018-12-19 | Fix width inferencing issue (#952) | Jack Koenig |
| 2016-12-05 | Fix literal width (#389) | Jack Koenig |
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index : chiselX | |
| Chisel with SFC compatibility |
| summaryrefslogtreecommitdiff |