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path: root/src/test/scala/chiselTests/Mem.scala
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2018-05-23Add test for zero-width Mems. (#821)grebe
2018-03-06Fix SyncReadMem.read; add test (#796)Andrew Waterman
SyncReadMem.read with an enable signal currently only works in compatibility mode, where Wires are implicitly initialized to DontCare. Fix by explicitly assigning DontCare to the Wire. This might fix #775.
2017-12-19Add source info / compile options transforms to Mem accessors (#744)Richard Lin
Fixes #708