summaryrefslogtreecommitdiff
path: root/src/test/scala/chiselTests/IllegalRefSpec.scala
AgeCommit message (Collapse)Author
2022-01-10Apply scalafmtJack Koenig
Command: sbt scalafmtAll
2020-10-01Move Chisel3 to SPDX license conventions (#1604)Chick Markley
Change source and other relevant files to use SPDX license LICENSE file moved from src/ to ./ Changed license file to refer to this per recommendation using_spdx_license_list_short_identifiers WARNING: Tests fail with as of yet undiagnosed error ``` [error] Failed: Total 691, Failed 19, Errors 0, Passed 672, Ignored 15 [error] Failed tests: [error] chiselTests.QueueSpec [error] examples.VendingMachineGeneratorSpec [error] chiselTests.HarnessSpec [error] chiselTests.ConnectSpec [error] chiselTests.aop.SelectSpec [error] chiselTests.PopCountSpec [error] chiselTests.CloneModuleSpec [error] (Test / test) sbt.TestsFailedException: Tests unsuccessful [error] Total time: 379 s (06:19), completed Sep 30, 2020 12:38:17 AM sbt:chisel3> ```
2020-07-31Check whether signals escape their when scopes (#1518)Albert Magyar
* Include and check when scoping as part of reg/mem/wire/node bindings * Allow outdated 'when' behavior of CHIRRTL memory ports with enables * Extend cross-module / when-visibility checks to all data refs * Fixes #1512 * Cannot be checked if outside a module context * E.g. delayed evaluation of printf / assert args * Add basic test cases for cross-module refs / signals escaping when scopes * Remove illegal cross-module references from existing tests