summaryrefslogtreecommitdiff
path: root/macros/src/main/scala/chisel3/internal/sourceinfo
AgeCommit message (Expand)Author
2022-06-08Enhance suggestion in literal extract warning (#2569) (#2570)mergify[bot]
2022-06-07Add single argument Bits.extract (#2566) (#2568)mergify[bot]
2022-06-03Deprecate implicit .U() and .S() syntax for literal bit extracts (backport #2...mergify[bot]
2022-02-01Optional clock param for memory ports (#2333) (#2382)mergify[bot]
2022-01-10Apply scalafmtJack Koenig
2021-10-05Deprecate auto-application of empty argument lists to parameterless functions...Jared Barocsi
2021-09-05Add Definition and Instance API (#2045)Adam Izraelevitz
2021-08-23Add multiple dimensions to VecInit fill and iterate (#2065)anniej-sifive
2021-08-04Added VecInit factory methods (fill,iterate) (#2059)anniej-sifive
2020-10-01Move Chisel3 to SPDX license conventions (#1604)Chick Markley
2020-07-21Delete outdated scalastyle configuration comments from sourceAlbert Magyar
2020-03-25Rename subprojects to more canonical namesJack Koenig