| Age | Commit message (Collapse) | Author |
|
(cherry picked from commit 13fb4595b3b21beadaad5ba5c5d131138099d6e1)
Co-authored-by: Adam Izraelevitz <adam.izraelevitz@sifive.com>
|
|
Command:
sbt scalafmtAll
|
|
Exposing more internals of D/I, which are required for supporting D/I with more powerful Chisel libraries:
- Exposing IsClone[_]
- Exposing InstantiableClone[_]
- Gated builders for Instance/Definition
- Unsealing Lookupable, with protected accessors for proto and cloned
|
|
|
|
|
|
This introduces a new experimental API for module instantiation that disentagles
elaborating the definition (or implementation) from instantiation of
a given module. This solves Chisel's longstanding reliance on
"Deduplication" for generating Verilog with multiple instances of the
same module.
The new API resides in package chisel3.experimental.hierarchy. Please
see the hierarchy ScalaDoc, documentation, and tests for examples of
use.
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
|