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2022-09-30Cookbooks: use more mdoc power, fix issues (#2752) (#2754)mergify[bot]
Co-authored-by: Jack Koenig <koenig@sifive.com> (cherry picked from commit fc970ca28e562f2ea3ba160963604ea3deaf3467) Co-authored-by: Megan Wachs <megan@sifive.com>
2022-09-20Cleanup Cookbook and printing docs (#2727) (#2742)mergify[bot]
* Cleanup Cookbook and printing docs * Format specifiers are actually concise now Co-authored-by: Megan Wachs <megan@sifive.com> (cherry picked from commit df2a71833ffc8ee8a053a1e8ea41c482e46be132) Co-authored-by: Aditya Naik <91489422+adkian-sifive@users.noreply.github.com>
2022-08-16Add a cookbook and publicly visible scaladoc for prefix, noPrefix (#2687) ↵mergify[bot]
(#2690) * Add a cookbook and publicly visible scaladoc for prefix, noPrefix (cherry picked from commit ae7dc30b3b99f1fbd91c35f54bc19be7c55f74a3) Co-authored-by: Megan Wachs <megan@sifive.com>
2022-08-12Add ability to suppress enum cast warnings (#2671) (#2674)mergify[bot]
(cherry picked from commit 1ad820f7f549eddcd7188b737f59a240e48a7f0a) Co-authored-by: Zachary Yedidia <zyedidia@gmail.com>
2022-08-02Fix example in Chisel Type vs Scala Type article (#2655) (#2657)mergify[bot]
(cherry picked from commit 0b2c211beefeefb72c86ea69a0b2a0101b2f2c20) Co-authored-by: Megan Wachs <megan@sifive.com>
2022-07-25Add an Explanation chapter about Scala types vs Chisel Types vs Hardware ↵mergify[bot]
(#2626) (#2642) (cherry picked from commit 81fcf229da84e334cdc466ffbb8ea74c7975a4a9) Co-authored-by: Megan Wachs <megan@sifive.com>
2022-06-27Fix broken link in interfaces-and-connections.md (#2607) (#2608)mergify[bot]
Links between markdown pages should not have any file extension to ensure they work on the website. (cherry picked from commit 04d4dc6da11678d0f12f84913fc05359d9a998a1) Co-authored-by: Jack Koenig <koenig@sifive.com>
2022-06-17[docs] Document partial register reset (#2582) (#2583)mergify[bot]
(cherry picked from commit d54a37a51b16fb6e46093265d65fd47d5318f67f) Co-authored-by: Jack Koenig <koenig@sifive.com>
2022-06-16Define leading '_' as API for creating temporaries (backport #2580) (#2581)mergify[bot]
* Define leading '_' as API for creating temporaries Chisel and FIRRTL have long used signals with names beginning with an underscore as an API to specify that the name does not really matter. Tools like Verilator follow a similar convention and exclude signals with underscore names from waveform dumps by default. With the introduction of compiler-plugin prefixing in Chisel 3.4, the convention remained but was hard for users to use unless the unnnamed signal existed outside of any prefix domain. Notably, unnamed signals are most useful when creating wires inside of utility methods which almost always results in the signal ending up with a prefix. With this commit, Chisel explicitly recognizes signals whos val names start with an underscore and preserve that underscore regardless of any prefixing. Chisel will also ignore such underscores when generating prefixes based on the temporary signal, preventing accidental double underscores in the names of signals that are prefixed by the temporary. (cherry picked from commit bd94366290886f3489d58f88b9768c7c11fa2cb6) * Remove unused defaultPrefix argument from _computeName (cherry picked from commit ec178aa20a830df2c8c756b9e569709a59073554) # Conflicts: # core/src/main/scala/chisel3/Module.scala # core/src/main/scala/chisel3/experimental/hierarchy/ModuleClone.scala * Resolve backport conflicts * Waive false positive binary compatibility errors Co-authored-by: Jack Koenig <koenig@sifive.com>
2022-05-19Update experimental-features.md (#2537) (#2538)mergify[bot]
(cherry picked from commit 68510515467ef7a86c54b2e710bfc5e736f7a2aa) Co-authored-by: Gonsolo <gonsolo@gmail.com>
2022-04-12Enhance views to [sometimes] support dynamic indexing and implement FlatIO ↵mergify[bot]
(backport #2476) (#2479) * Capture 1:1 mappings of Aggregates inside of views This is implemented by including any corresponding Aggregates from the DataView.mapping in the AggregateViewBinding.childMap (which is now of type Map[Data, Data]). This enables dynamically indexing Vecs that are themselves elements of larger Aggregates in views when the corresponding element of the view is a Vec of the same type. It also increases the number of cases where a single Target can represent part of a view. (cherry picked from commit 1f6b1ca14ccf86918065073c3f6f3626dd83a68e) * Add FlatIO API for creating ports from Bundles without a prefix (cherry picked from commit 772a3a1fe3b9372b7c2d7cd2d424b2adcd633cdb) * [docs] Add FlatIO to the general cookbook (cherry picked from commit b4159641350f238f0f899b69954142ce8ee11544) Co-authored-by: Jack Koenig <koenig@sifive.com>
2022-03-15[docs] Add Cookbook section on aliased Bundle fields (#2444) (#2448)mergify[bot]
(cherry picked from commit d4dd21191c63a3b125193a7ffb83d478aa945d5a) Co-authored-by: Jack Koenig <koenig@sifive.com>
2022-03-07Tweaks to the Verilog-vs-Chisel Page (#2432) (#2433)mergify[bot]
* Tweaks to the Verilog-vs-Chisel Page * Update cookbook.md * Update verilog-vs-chisel.md * Update verilog-vs-chisel.md (cherry picked from commit 7432bdff8369ba55db73c7934e41bb6f4060bb6d) Co-authored-by: Megan Wachs <megan@sifive.com>
2022-03-04Add SVG Version of Bundle Example Diagram (#2425) (#2431)mergify[bot]
(cherry picked from commit 98fdfc5e609099cb4fb1749132cc62236148c6da) Co-authored-by: Megan Wachs <megan@sifive.com>
2022-03-03Add Verilog-chisel side by side Reference Page to Docs (#2323) (#2426)mergify[bot]
Co-authored-by: Shola Ogunkelu @Shorla Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Deborah Soung <debs@sifive.com> Completed as part of Outreachy Internship Dec 2021-March 2022. (cherry picked from commit 362702f3fd79bf1071db4acecc679f25a0b94a8a) Co-authored-by: Olushola Ogunkelu <77856859+Shorla@users.noreply.github.com>
2022-01-20Fix link to Naming Cookbook (#2356) (#2357)mergify[bot]
#naming implies within the current file. Removing the # refers to a file in the current directory. (cherry picked from commit 512ddd6c8b079dd83f2a3ed793e6595822a382cb) Co-authored-by: Jack Koenig <koenig@sifive.com>
2022-01-07Add a Select.ios that works with Definition/Instance, fix isA behavior (#2315)Megan Wachs
* New Feature: Add a Select.ios that works with Definition/Instance * BugFix: isA now truly ignores type parameters
2021-12-20Better documentation for := and <> (#2312)Olushola Ogunkelu
2021-12-15Add "Upgrading From Chisel 3.4 to 3.5" (#2275)Jack Koenig
This new document is a place to describe issues users may run into when upgrading from Chisel 3.4 to 3.5. This initial version includes the solution for the removal of virtual method "val io". Co-authored-by: Megan Wachs <megan@sifive.com>
2021-12-08[docs] Update versioning appendix to include 3.5 (#2293)Jack Koenig
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2021-12-08Implement DataViews for Seq and Tuple (#2277)Jack Koenig
* DataProducts for Seq and Tuple2-10 in DataProduct companion object * DataViews for Seq and Tuple 2-10 in DataView companion object * HWTuple2-10 Bundles in chisel3.experimental * Implicit conversions from Seq to Vec and Tuple to HWTuple in chisel3.experimental.conversions
2021-12-07[docs] Remove body from minimizing output bits recipe (#2290)Jack Koenig
Remove the body from the emitted Verilog. This was the original intent of the example, and it avoids an issue where Jekyll was not able to render the Markdown file due to Verilog concatenation looking like a variable escape.
2021-12-04[docs] add minimizing output bits recipe (#2278)Øyvind Harboe
Co-authored-by: Jack Koenig <koenig@sifive.com>
2021-10-28[docs] Improve tieoff Bundle to 0 (#2218)Jack Koenig
Previously, the example had an extra wrapping module that led to the interesting example getting optimized away.
2021-10-27Add Select APIs for Hierarchy package (#2210)Adam Izraelevitz
* Add Hierarchy trait * Add Hierarchy trait * Add Hierarchy scaladoc * Add license * Add isA and tests * Add back isA * Add new Select APIs for hierarchy package * Update scaladoc * Write outlines for tests * Add tests and fixes to new Select functions * Make calculate via lazy val * Apply suggestions from code review Co-authored-by: Megan Wachs <megan@sifive.com> * Apply suggestions from code review Co-authored-by: Megan Wachs <megan@sifive.com> * Clean up scaladoc * Add shouldNot compile * Apply suggestions from code review Co-authored-by: Megan Wachs <megan@sifive.com> * Bugfix all funcs should analyze root too * Add mdoc, bugfix toDefinition * Make func private, add scaladoc * Update src/test/scala/chiselTests/experimental/hierarchy/InstanceSpec.scala Co-authored-by: Jack Koenig <koenig@sifive.com> * Made protected vals private * Apply suggestions from code review Co-authored-by: Jack Koenig <koenig@sifive.com> * Address code review comments * Added additional null check Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Jack Koenig <koenig@sifive.com>
2021-10-22Add name to Naming Explanation page (#2199)Shorla
* Update bundles-and-vecs.md * Update docs/src/explanations/bundles-and-vecs.md Co-authored-by: Megan Wachs <megan@sifive.com> * Update naming.md Added a title to the cookbook * Add name to Multiple Clock Domain page * Update multi-clock.md Co-authored-by: Megan Wachs <megan@sifive.com>
2021-10-14Update docs README with instructions for new pages (#2171)Megan Wachs
* Update docs README with instructions for new pages * Update docs/README.md
2021-10-13Update bundles-and-vecs.md (#2173)Shorla
* Update bundles-and-vecs.md * Update docs/src/explanations/bundles-and-vecs.md Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Megan Wachs <megan@sifive.com>
2021-10-13Update experimental-features.md (#2175)Abongwa Bonalais
* Update experimental-features.md Added title to Experimental features * Update experimental-features.md * Update docs/src/appendix/experimental-features.md Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Megan Wachs <megan@sifive.com>
2021-10-12Update cookbooks.md (#2172)Abongwa Bonalais
Added cookbooks to cookbooks.md
2021-10-11Added dataview to explanations.md (#2167)Abongwa Bonalais
* Added dataview to explanations.md * Update docs/src/explanations/explanations.md Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Megan Wachs <megan@sifive.com>
2021-10-11Added title to blackboxes.md (#2168)Abongwa Bonalais
* Added title * Update docs/src/explanations/blackboxes.md Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Megan Wachs <megan@sifive.com>
2021-10-11Create naming.md (#2161)Abongwa Bonalais
Added title to "Namimg Cookbook" website. Co-authored-by: Megan Wachs <megan@sifive.com>
2021-10-07Fix link in DataView explanation (#2153)Jack Koenig
2021-10-05Remove all Bundle cloneTypes and chiselRuntimeDeprecate its use (#2052)Megan Wachs
* Remove all manual cloneTypes and make it chisel runtime deprecated to add one * runtime deprecate cloneType with runtime reflection * [Backport this commit] Bundle: add check that override def cloneType still works (will be made an error later) * Plugin: make it an error to override cloneType and add a test for that * Docs: can't compile the cloneType anymore * BundleSpec: comment out failing test I cannot get to fail or ignore Co-authored-by: Jack Koenig <koenig@sifive.com>
2021-10-05Remove workaround for fixed issue in mdoc crash blocks (#2147)Jack Koenig
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2021-10-02Fix typos in documentation (#2141)Nick
Close #2138
2021-09-05Add Definition and Instance API (#2045)Adam Izraelevitz
This introduces a new experimental API for module instantiation that disentagles elaborating the definition (or implementation) from instantiation of a given module. This solves Chisel's longstanding reliance on "Deduplication" for generating Verilog with multiple instances of the same module. The new API resides in package chisel3.experimental.hierarchy. Please see the hierarchy ScalaDoc, documentation, and tests for examples of use. Co-authored-by: Jack Koenig <koenig@sifive.com> Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
2021-08-23Add multiple dimensions to VecInit fill and iterate (#2065)anniej-sifive
Co-authored-by: Jack Koenig <koenig@sifive.com>
2021-08-17[docs] Add example of stripping directions from type (#2074)Jack Koenig
* [docs] Add example of stripping directions from type * Apply suggestions from code review Co-authored-by: Megan Wachs <megan@sifive.com> * Improve := comment Co-authored-by: Megan Wachs <megan@sifive.com> Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
2021-08-12Add DataView (#1955)Jack Koenig
DataView is a mechanism for "viewing" Scala objects as a subtype of `Data`. Often, this is useful for viewing one subtype of `Data`, as another. One can think about a DataView as a cross between a customizable cast and an untagged union. A DataView has a Target type `T`, and a View type `V`. DataView requires that an implementation of `DataProduct` is available for Target types. DataProduct is a type class that provides a way to iterate on `Data` children of objects of implementing types. If a DataView is provided for a type T to a type V, then the function .viewAs[V] (of type T => V) is available. The object (of type T) returned by .viewAs is called a "View" and can be used as both an rvalue and an lvalue. Unlike when using an .asTypeOf cast, connecting to a "View" will connect to the associated field or fields of the underlying Target. DataView also enables .viewAsSupertype which is available for viewing Bundles as a parent Bundle type. It is similar to .viewAs but requires a prototype object of the Target type which will be cloned in order to create the returned View. .viewAsSupertype maps between the corresponding fields of the parent and child Bundle types.
2021-08-05Small changes to memory doc (#2062)Chick Markley
* Small changes to memory doc - Fixed typo "except" => "accept" - Use `Counter` explicitly in ROM section example. * Fix counter doc compile error * remove invisible doc block in memory example * more small fixes to make mem example pass doc compile * Get rid of sine wave iterator in memory doc * get rid of tabs on VecInit example * get rid of tabs on VecInit example
2021-07-08Add `isOneOf` method to `ChiselEnum` (#1966)Verneri Hirvonen
* Add @ekiwi's code as a starting point * Add test for ChiselEnum isOneOf method * Make isOneOfTester naming consistent with other testers * Add scaladoc comments for isOneOf * Add isOneOf tests that use the method that takes variable number of args * Add guide level documentation example for isOneOf
2021-07-07Fix ChiselEnum docs (#2016)Jack Koenig
Also add newline to end of `verilog` modifier code blocks so that there is always a newline between code blocks and following material.
2021-07-01Update docs for ChiselEnumJack Koenig
2021-06-25Update type_hierarchy (#1977)Jack Koenig
* Add Clock * Add Analog * Add Interval * Add line from User Types (...) to Record
2021-05-20doc: link to developer style guide (#1929)Martin Schoeberl
2021-04-28Cookbook: clean up desiredName example (#1886)Megan Wachs
* Cookbook: clean up desiredName example * Update cookbook.md
2021-04-27Introduce VecLiterals (#1834)Chick Markley
This PR provides for support for Vec literals. They can be one of two forms Inferred: ``` Vec.Lit(0x1.U, 0x2.U) ``` or explicit: ``` Vec(2, UInt(4.W)).Lit(0 -> 0x1.U, 1 -> 0x2.U) ``` - Explicit form allows for partial, or sparse, literals. - Vec literals can be used as Register initializers - Arbitrary nesting (consistent with type constraints is allowed)
2021-04-26Cookbooks: make examples more clear and remove naming (#1881)Megan Wachs
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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