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* Promote ChiselEnum user APIs from experimental (#2929)
They are commonly used and if we were ever to change them, we will need
to go through a deprecation process anyway.
Note that the EnumAnnotations remain in chisel3.experimental because,
like all Chisel annotation support, they are slated to be deprecated and
removed.
(cherry picked from commit 424e9446f1675fe0168e22bdfbbe85db997376e6)
# Conflicts:
# docs/src/cookbooks/verilog-vs-chisel.md
# docs/src/explanations/chisel-enum.md
* Maintain binary compatbility, use aliases in chisel3 package
* Deprecate the actual classes in chisel3.experimental
* Also fix backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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#2534) (#2559)
* Deprecate .U() and .S() syntax for literal bit extracts (#2534)
(cherry picked from commit cadaf33a650ef898fdab2f81244e4ad6a07a9ea8)
# Conflicts:
# macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala
* Fix backport conflict (#2560)
Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>
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This is a formatted version of the p"..." interpolator analogous to
Scala's f"..." interpolator. The primary difference is that it supports
formatting interpolated variables by following the variable with
"%<specifier>". For example:
printf(cf"myWire = $myWire%x\n")
This will format the hardware value "myWire" as a hexidecimal value in
the emitted Verilog. Note that literal "%" must be escaped as "%%".
Scala types and format specifiers are supported and are handled in the
same manner as in standard Scala f"..." interpolators.
(cherry picked from commit 037f7b2ff3a46184d1b82e1b590a7572bfa6a76b)
Co-authored-by: Girish Pai <girish.pai@sifive.com>
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Command:
sbt scalafmtAll
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Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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functions (#2124)
* Migrate nullary funcs to parameterless versions
* Make deprecation message and dummy arguments clear and consistent
Co-authored-by: Megan Wachs <megan@sifive.com>
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Change source and other relevant files to use SPDX license
LICENSE file moved from src/ to ./
Changed license file to refer to this per recommendation
using_spdx_license_list_short_identifiers
WARNING: Tests fail with as of yet undiagnosed error
```
[error] Failed: Total 691, Failed 19, Errors 0, Passed 672, Ignored 15
[error] Failed tests:
[error] chiselTests.QueueSpec
[error] examples.VendingMachineGeneratorSpec
[error] chiselTests.HarnessSpec
[error] chiselTests.ConnectSpec
[error] chiselTests.aop.SelectSpec
[error] chiselTests.PopCountSpec
[error] chiselTests.CloneModuleSpec
[error] (Test / test) sbt.TestsFailedException: Tests unsuccessful
[error] Total time: 379 s (06:19), completed Sep 30, 2020 12:38:17 AM
sbt:chisel3>
```
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* Show linking against Javadoc
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
* Add sbt-api-mappings plugin
This adds the sbt-api-mappings plugin which enables
auto-linking (properly setting the apiMappings for the sbt project) so
that Scaldoc/unidoc generation will now automatically link against
Java and Scala API docs (and use the right version).
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
* Show linking against Scala APIs
Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
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* Rename coreMacros to macros
* Rename chiselFrontend to core
Also make each subproject publish with "chisel3-" as a prefix
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