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path: root/core/src/main/scala/chisel3/internal/firrtl/Converter.scala
AgeCommit message (Expand)Author
2022-11-11Change RawModule._commands to a VectorBuilder (backport #2839) (#2841)mergify[bot]
2022-11-08Switch to using experimental trait for OpaqueTypes (backport #2783) (#2836)mergify[bot]
2022-11-07Bugfix converter clearing flips (backport #2788) (#2832)mergify[bot]
2022-08-25Bugfix - OpaqueSlot replace invalid localName (backport #2701) (#2702)mergify[bot]
2022-08-16Add OpaqueType support to Records (backport #2662) (#2679)mergify[bot]
2022-01-10Apply scalafmtJack Koenig
2021-12-15Restore Port to public API and deprecate (#2302)Jack Koenig
2021-09-23make all verification statements publically available (#2089)Kevin Laeufer
2021-08-23Remove chisel3's own firrtl Emitter, use firrtl SerializerJack Koenig
2021-08-18Revert "remove DefRegInit, change DefReg API with option definition. (#1944)"...Jack Koenig
2021-08-17remove DefRegInit, change DefReg API with option definition. (#1944)Jiuyang Liu
2021-07-06Make printf return BaseSim subclass so it can be named/annotated (#1992)Deborah Soung
2021-06-28Fix CloneModuleAsRecord support for .toTargetJack Koenig
2021-06-24create and extend annotatable BaseSim class for verification nodes (#1968)Deborah Soung
2021-04-26Add some error context to Converter .getRefs (#1878)Jack Koenig
2020-10-01Move Chisel3 to SPDX license conventions (#1604)Chick Markley
2020-07-22Basic model checking API (#1499)Tom Alcorn
2020-07-21Delete outdated scalastyle configuration comments from sourceAlbert Magyar
2020-03-25Rename subprojects to more canonical namesJack Koenig
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