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This is necessary for user-defined Record-derived types to retain
the same signal name as they would using a Vec.
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Fixes #501. Also added UIntOps test.
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This turned up after updating #494 (Remove explicit import of NotStrict) and adding the missing implicit CompileOptions to ":="'s signature at which point Scala pointed out FixedPoint's ":=" could not override Data's final ":=" with the same signature: the implicit time bomb.
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* Bugfix #513. Needs better test case
* Improved test
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* change builder for bundle reflection fix
* fixed bug -- should be not assignable
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* Add scaladoc examples for Vec and Bundle
* address comments, added @example tag
eliminate extraneous context
* address comments, added @example tag
eliminate extraneous context
* ok, I've wrestled with the javadoc sytnax, the following commit, is my best result so far
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withClockAndReset, withReset, and withClock allow changing the implicit clock and reset.
Module.clock and Module.reset provide access to the current implicit clock and reset.
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* Don't allow analog to analog monoconnect
adjust tests accordingly
* demonstrate bit loss in shift right for fixed point
* cleaned up some stuff.
this does not test clean due to bug in firrtl
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Used for stitching Verilog inout through Chisel Modules (from BlackBox
to BlackBox)
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* Fix up Absolute value #abs
Defines #abs in Num
Implement #abs in UInt
Change #abs in SInt to return an SInt
Change #abs in FixedPoint to return a FixedPoint
Added a couple of tests
Add some scala style suppression to Bits so I can read code in IntelliJ
* Per review
Add tests that abs works for positive values
Added SInt and UInt tests for abs to new underpopulated IntegerMathSpec
Used fixed point literals in fixed points abs definition
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Retain un-deprecated SeqMem in compatibility mode, deprecate in chisel3.
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* Added vec IO tests for #104
* Added Vec test case for Reg of vecs
* Change Vec creation to check if gen is lit (and hence needs to be declared)
Fixes #104
* Fix tests (add IO())), Vec.fill()
* Fix deprecated usage.
* Add Binding IO() NPE fix so tests pass.
* Fix style - use space consistently.
* Fix style - use space consistently.
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Fix default suggested name of Module instances (now based on desired name
rather than actual assigned name).
Remove parent/child relationship from Namespace.
Previously, Module and Bundle namespaces were "children" of the Module
definition namespace. This could lead to collisions that would give unexpected
names for module instances or Bundle elements. In particular, otherwise
identical modules that instantiate other identical modules in such a way that
the instance cannot be named via reflection would not be deduplicated because
the names of the instances would collide with the names of the modules in the
Builder.globalNamespace.
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* Name propagation
* chiselName everywhere at best-effort level
* Better collision handling
* Allow recursing into inner anonymous functions
* Add for loop and anonymous inner function tests
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Record gives uses the power to create collections of heterogenous elements.
Bundle is a special case of Record that uses reflection to populate the
elements of the collection. Bundle also attempts to implement cloneType whereas
users of Record are required to supply one.
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* Make fromBits work with types other than UInt
* Oops, left in a println
* Add test for truncation/expansion
* Fix stuff that broke when FixedPoint fromBits PR was merged.
* Use .BP shorthand added in previous PR
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* Support for creating chisel annotations that are consumed by firrtl
Update annotation serialization in Driver
Add DiamondAnnotation Spec that illustrates how to do simple annotations
frontEnd must have dependency on firrtl
Add annotation method to Module
Circuit has extra optional parameter that is Seq of Annotations
In Builder add annotation buffer to DynamicContext to store annotations created in modules
Added explicit types on naming api methods to avoid type confusion
Because some names are not available until elaboration create intermediate ChiselAnnotation that
gets turned into a firrtl Annotation after elaboration
In execute pass firrtl text and annotation to firrtl are now passed in through optionManager, though
intermediate file .fir and .anno files are still created for inspection and/or later use
* Somehow missed ChiselAnnotation
* fixes for Jack's review of PR
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Fixes #388
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(#387)
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Get rid of some cruft exposed in #373
This also allows Bits.fromtInt(...) to be removed. Yay!
All old APIs (with some new restrictions, rocket still works fine) are preserved without deprecation in Chisel._, aside from the non-compile-time-checkable Map[] enum constructor which probably should have been deprecated during chisel2. The Map[] enums have been removed from chisel3._ without deprecation.
The new restriction is that nodeType (legacy API) may only be of UInt type with unspecified width. Note that Bits() creates a UInt, and if you can't control the enum values, it makes little sense to specify a bitwidth.
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Data.toUInt() doesn't exist.
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Remove modName from Module
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compatibility package object
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