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classtag works apparently?
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And more changes
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RawModule will require major reworking in the future
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+ compiler rewrites
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build is failing with a compile error in 3.3.3 due to something in
Aggregate.scala. reduce to smallest form and file a bug report maybe?
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35 erros
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#2935) (#2936)
* TruthTable improvements: structural equality and delete sort (#2935)
We had implemented equals, but not hashCode. This commit also changes
the implemental of equals to just use the underlying values instead of
wasting the compute calling .toString.
Delete TruthTable.sort, it is unused.
(cherry picked from commit b5d9c08b2d0994b94df2380425282206fe1f25bc)
* Restore and deprecate TruthTable.sort
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* Promote ChiselEnum user APIs from experimental (#2929)
They are commonly used and if we were ever to change them, we will need
to go through a deprecation process anyway.
Note that the EnumAnnotations remain in chisel3.experimental because,
like all Chisel annotation support, they are slated to be deprecated and
removed.
(cherry picked from commit 424e9446f1675fe0168e22bdfbbe85db997376e6)
# Conflicts:
# docs/src/cookbooks/verilog-vs-chisel.md
# docs/src/explanations/chisel-enum.md
* Maintain binary compatbility, use aliases in chisel3 package
* Deprecate the actual classes in chisel3.experimental
* Also fix backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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#2907) (#2928)
* Check for Vec subaccess in NamedComponent and throw a nicer error. (#2907)
This would previously end up throwing an exception later, when trying
to create a component name and realizing that it was invalid. Instead,
this detects Vec subaccesses early, and gives a more precise error and
suggestion.
(cherry picked from commit d8c30961c7b293ee19024a487698630367ee71c6)
# Conflicts:
# core/src/main/scala/chisel3/internal/Builder.scala
* Resolve backport conflicts
Co-authored-by: Mike Urbach <mikeurbach@gmail.com>
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ChiselEnums check if they should create annotations every time an
instance of them is bound. Because so many annotations would be created,
they check to see if an equivalent annotation has already been added to
the annotations. Previously, this used a linear search of the
annotations, now it uses a HashSet.
(cherry picked from commit 96bde092e449281dc70ebdb05f21695468c3e5fa)
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit b91a2050aeb143aa80762dfb1b40f1e5035de4b5)
Co-authored-by: Megan Wachs <megan@sifive.com>
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* DRY out CI (#2903)
* Minor tweaks to setup-oss-cad-suite
* Switch espresso installation to composite action
* Switch circt installation to composite action
(cherry picked from commit dbd5f48a884a236f95c8476d56e28ca911b64a8d)
# Conflicts:
# .github/workflows/test.yml
* resolve backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Switch from YosysHQ action to composite action (#2901)
The YosysHQ Github Action for setting up the OSS CAD Suite is very flaky
in CI so instead we can just wget and untar the suite ourselves. It also
seems prudent to try out composite actions to avoid duplication of
installation steps.
(cherry picked from commit 75aeaed9efaf1ca35573775cd21ea3b5e89e9442)
# Conflicts:
# .github/workflows/test.yml
* Resolve backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Fix BitSet decoder API when errorBit=False
When errorBit is set to False, the original code will return
`Unit` which will be `()` in interpolated string.
* Add testcases for both errorBit cases in BitSetSpec
(cherry picked from commit 42416cb6c6a3019fc29b9d98cfea3e3bb4e42684)
Co-authored-by: Ocean Shen <30361859+OceanS2000@users.noreply.github.com>
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Co-authored-by: Aditya Naik <aditya.naik@sifive.com>
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* [ci] Update Github Actions (#2876)
* Switch from deprecated setup-scala to setup-java
* Switch from deprecated set-output to $GITHUB_OUTPUT
* Use $GITHUB_STEP_SUMMARY for reporting
(cherry picked from commit b01dd3cb613a13da4befb66dd09a8c0ba1689b68)
# Conflicts:
# .github/workflows/test.yml
* Resolve backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Make PriorityMux stack safe (#2854)
It used to be implemented with recursion, now it's implemented with a
stack safe reverse and foldLeft.
Also there were no tests for PriorityMux so I added one which helps
prove the change is functionally correct.
(cherry picked from commit 269ce472e9aa0c242fc028871a1fd5b045c82f83)
# Conflicts:
# src/test/scala/chiselTests/util/PipeSpec.scala
* Resolve backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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* Add versionScheme (PVP) to SBT publish settings (#2871)
This allows build tools to warn users about possible binary
incompatibility issues when using dependencies that depend on
mutually incompatible versions of Chisel.
(cherry picked from commit 9f080d51d1e7bb9d44fb10da86fcaab68a21377b)
# Conflicts:
# build.sbt
* Resolve backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Implement compressed Namespace (#2856)
The namespace disambiguates requests for the same name with _<idx>.
Rather than storing every disambiguated name in the underlying HashMap,
it now only stores the base along with the "next available" index. This
makes the logic for checking if a name is already contained in the
namespace slightly more sophisticated because users can name things in a
way that will collide with disambiguated names from a common substring.
For example, in naming the sequence "foo", "foo", "foo_1", the 2nd "foo"
takes the name "foo_1" so the following "foo_1" gets disambiguated to
"foo_1_1". But since we compressed that original "foo_1" into the same
HashMap entry as just "foo", we have to do a form of "prefix checking"
whenever naming something that ends in "_<idx>".
In practice, the saved memory allocations more than make up for the more
complicated logic to disambiguate names because the common case is still
fast.
(cherry picked from commit 1654d87a02ca799bf12805a611a91e7524d49843)
# Conflicts:
# core/src/main/scala/chisel3/internal/Builder.scala
* Resolve backport conflicts
Co-authored-by: Jack Koenig <koenig@sifive.com>
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(cherry picked from commit 49feb083c69066988ca0666ea4249a86570e2589)
Co-authored-by: Megan Wachs <megan@sifive.com>
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* Change RawModule._commands to a VectorBuilder (#2839)
* Change RawModule._commands to a VectorBuilder
Use the resulting Vector to build the underlying Component's commands
and then use those instead of copying the original ArrayBuffer when
iterating on commands. Previously, the Component was using a List to
hold the commands which is particularly memory inefficient, especially
for large modules.
* Optimize Converter's handling of Seq[Command]
It previously converted the Commands to a List (which, while not
captured in the type system, they were already a List) and then used
head and tail iteration. This is less efficient with the new underlying
Vector implementation.
(cherry picked from commit 48a1ef0a3872c6b68d46145764d977926923a270)
* Waive false binary compatibility failures
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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(cherry picked from commit aa596b98d5e030294041f2e90eee1f78ca1e401b)
Co-authored-by: Megan Wachs <megan@sifive.com>
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(#2757)
* Add internal methods to maintain binary compatibility
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
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#2792) (#2834)
* Fixup and unit tests for D/I of IOs without explicit Input/Output (#2792)
(cherry picked from commit f24a624863f0fc460fd862238688ea8612ffdf5e)
# Conflicts:
# core/src/main/scala/chisel3/Module.scala
* Resolve backport conflicts
Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Unify Chisel2 and chisel3 directionality (#2634)
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 1aea4ef96466cbe08150d20c85c88b81e4e4f80f)
# Conflicts:
# core/src/main/scala/chisel3/Aggregate.scala
# core/src/main/scala/chisel3/Module.scala
# src/test/scala/chiselTests/Direction.scala
* fix up backport
* fix up backport
* clean up diff
* make test order like it was on master
Co-authored-by: Adam Izraelevitz <adam.izraelevitz@sifive.com>
Co-authored-by: Megan Wachs <megan@sifive.com>
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* Switch to using experimental trait for OpaqueTypes (#2783)
This makes it more clear that the feature is experimental. Users may
still override the opaqueType method for more dynamic control over when
instances of a given Record are OpaqueTypes or not, but they are
discouraged from doing so.
(cherry picked from commit 7525dc71ccc2050d8e4a68b38f3b76920ba693fc)
* Fix cloneType in RecordSpec
Co-authored-by: Jack Koenig <koenig@sifive.com>
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#2829) (#2831)
* Add Aggregate.elementsIterator and micro-optimize
elementsIterator provides a more efficient API for iterating on the
elements of Aggregates. It is especially useful for Records where
getElements returns a Seq and thus eagerly constructs a new
datastructure which may then just be iterated on anyway.
This new elementsIterator API is then used throughout the codebase where
it makes sense.
Also change Vec.getElements to just return the underlying self instead
of constructing a new Seq.
(cherry picked from commit defa440b349031475daeff4024fad04925cccee6)
# Conflicts:
# core/src/main/scala/chisel3/Aggregate.scala
# core/src/main/scala/chisel3/Module.scala
# core/src/main/scala/chisel3/experimental/Trace.scala
* Move Aggregate.bind inline into Record.bind
Vec overrides bind and does not call the version in Aggregate so the
version in Aggregate is misleading in that its only ever used by
Records. Now there is no version in Aggregate and the actual
functionality and use is more clear.
(cherry picked from commit b054c30ba47026cb2a9b28c696a0a0a58b1e2ee7)
# Conflicts:
# core/src/main/scala/chisel3/Aggregate.scala
* Extract and optimize duplicate checking Record.bind
This replaces an immutable.Map with a single mutable.HashSet and saves
the allocation of # elements Seqs.
(cherry picked from commit 832ea52bc23424bb75b9654422b725a9cafaef40)
# Conflicts:
# core/src/main/scala/chisel3/Aggregate.scala
* Add check for Records that define def elements
(cherry picked from commit a4f223415de19e2a732e0b6a8fe681f706a19a56)
* Resolve backport conflicts
* Make elementsIterator final and package private
* Waive false MiMa failure
Co-authored-by: Jack Koenig <koenig@sifive.com>
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* Bugfix converter clearing flips (#2788)
* Bugfix: Output on Vec of bundle with mixed field orientations
* Bugfix OpaqueTypes clearing flips
(cherry picked from commit f05bff1a337589bafebd08783bb0f6a72092a95a)
# Conflicts:
# src/test/scala/chiselTests/Direction.scala
* Resolve backport conflicts
Co-authored-by: Adam Izraelevitz <adam.izraelevitz@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
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